AS7C33512PFS16A
AS7C33512PFS18A
®
1
Pin Configuration for 512 x 18 for 119-ball BGA
1
2
3
4
5
6
7
A
B
C
D
E
VDDQ
NC
A
A
ADSP
ADSC
VDD
NC
A
A
VDDQ
NC
CE2
A
A
A
A
NC
A
A
A
NC
DQb
NC
NC
DQb
NC
DQb
NC
VDD
DQb
NC
DQb
NC
DQPb
A
VSS
VSS
VSS
BWb
VSS
NC
VSS
VSS
VSS
VSS
VSS
LBO
A
VSS
VSS
VSS
VSS
VSS
NC
VSS
BWa
VSS
VSS
VSS
FT
DQPa
NC
DQa
NC
DQa
VDD
NC
DQa
NC
DQa
NC
A
NC
CE1
OE
DQa
VDDQ
DQa
NC
F
VDDQ
NC
G
H
J
ADV
GWE
VDD
CLK
NC
DQb
VDDQ
NC
VDDQ
DQa
NC
K
L
DQb
VDDQ
DQb
NC
M
N
P
BWE
A12
A02
VDD
NC
VDDQ
NC
DQa
NC
R
T
U
NC
NC
A
A
A
ZZ
VDDQ
NC
NC
NC
NC
NC
VDDQ
1 Note pins 6D and 2P are NC for x16.
2 A0 and A1 are the two least significant bits (LSB) of the address field and set the internal burst
counter if burst is desired.
4/15/02; v.1.5
Alliance Semiconductor
3 of 14
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
