AS7C33256NTF32A
AS7C33256NTF36A
®
Timing characteristics over operating range
-75
–85
–10
1
Parameter
Cycle time
Sym Min Max Min Max Min Max Unit Notes
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
8.5
-
-
10
–
–
8.5
4.0
–
12
–
–
10
4.0
–
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CYC
CD
Clock access time
7.5
Output enable low to data valid
Clock high to output low Z
Data Output invalid from clock high
Output enable low to output low Z
Output enable high to output high Z
Clock high to output high Z
Output enable high to invalid output
Clock high pulse width
-
3.5
–
–
OE
2.5
2.5
0.0
-
-
-
2.5
2.5
0
2.5
2.5
0
2,3,4
2
LZC
OH
–
–
-
–
–
2,3,4
2,3,4
2,3,4
LZOE
HZOE
HZC
OHOE
CH
3.5
4.0
-
–
4.0
5.0
–
–
4.0
5.0
–
-
–
–
0.0
2.8
2.8
2.0
2.0
2.0
2.0
0.5
0.5
0.5
0.5
2.0
0.5
2.0
0.5
0
0
-
3.0
3.0
2.0
2.0
2.0
2.0
0.5
0.5
0.5
0.5
2.0
0.5
2.0
0.5
–
3.0
3.0
2.0
2.0
2.0
2.0
0.5
0.5
0.5
0.5
2.0
0.5
2.0
0.5
–
5
5
Clock low pulse width
-
–
–
CL
Address and Control setup to clock high
Data setup to clock high
-
–
–
6
AS
-
–
–
6
DS
Write setup to clock high
-
–
–
6, 7
6, 8
6
WS
Chip select setup to clock high
Address hold from clock high
Data hold from clock high
Write hold from clock high
Chip select hold from clock high
Clock enable setup to clock high
Clock enable hold from clock high
ADV setup to clock high
-
–
–
CSS
AH
-
–
–
-
–
–
6
DH
-
–
–
6, 7
6, 8
6
WH
-
–
–
CSH
CENS
CENH
ADVS
ADVH
-
–
–
-
–
–
6
-
–
–
6
ADV hold from clock high
-
–
–
6
1 See “AC test conditions” on page 15.
Snooze Mode Electrical Characteristics
Description
Conditions
ZZ > V
Symbol
Min
Max
Units
mA
Current during Snooze Mode
ZZ active to input ignored
I
30
IH
SB2
PDS
PUS
t
t
2
2
cycle
cycle
cycle
ZZ inactive to input sampled
ZZ active to SNOOZE current
ZZ inactive to exit SNOOZE current
t
2
ZZI
t
0
RZZI
11/8/04, v. 1.1
Alliance Semiconductor
P. 9 of 18
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
