AS7C251MPFS18A
®
Timing waveform of write cycle
t
t
CYC
t
CH
CL
CLK
ADSP
t
ADSPS
t
ADSPH
t
t
ADSCS
t
ADSCH
ADSC
t
AS
AH
ADSC loads new address
t
A1
A2
A3
Address
WS
t
WH
BWE
BW[a:d]
t
CSS
t
CSH
CE0, CE2
CE1
ADV
OE
t
ADVS
ADV suspends burst
t
ADVH
t
t
DS DH
D(A1)
D(A2)
D(A2Ý01)
D(A2Ý01)
D(A2Ý10)
D(A2Ý11)
D(A3)
D(A3Ý01)
D(A3Ý10)
Data In
ADV
Burst
Write
Read Q(A1) Suspend
Read
Q(A2)
Suspend
Write
D(A )
ADV
Burst
Write
Suspend
Write
ADV
Burst
Write
ADV
Burst
Write
Write
3
D(A )
Burst
Write
3Ý01
D(A )
Write
D(A1)
2
2Ý01
D(A
)
3Ý10
D(A
)
2Ý01
2Ý10
2Ý11
Q(A )
D(A
)
Q(A
)
Note: Ý = XOR when LBO = high/ no connect; Ý = ADD when LBO = low.
12/ 2/ 02, v. 0.9.2 Advance Info
Alliance Semiconductor
17 of 21
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
