AS7C251MPFS18A
®
Key to switching waveforms
Rising input
Falling input
Undefined/ don’t care
Timing waveform of read cycle
t
t
CYC
CL
t
CH
CLK
t
ADSPS
t
ADSPH
ADSP
t
ADSCS
t
ADSCH
ADSC
t
Load new address
AS
t
AH
A1
A2
A3
Address
t
WS
t
WH
GWE, BWE
CE0, CE2
t
CSS
CSH
t
CE1
t
ADVS
t
ADVH
ADV
OE
ADV inserts wait states
t
t
CD
HZOE
t
t
OH
HZC
D
Q(A1)
Q(A2)
Q(A2Ý01)
Q(A2Ý10)
Q(A2Ý11)
Q(A3)
Q(A3)
Q(A3Ý01)
Q(A3Ý10)
Q(A3Ý10)
OUT
t
(pipelined mode)
OE
t
LZOE
D
Q(A1)
Q(A2Ý01)
Q(A2Ý10)
Q(A2Ý11)
Q(A3Ý01)
Q(A3Ý11)
OUT
(flow-through mode)
t
HZC
Read Suspend Read
Burst
Read
2Ý01
Burst
Read
Suspend
Read
Burst
Read
2Ý11
Read
Q(A3)
Burst
Read
3Ý01
Burst
Read
Burst
Read
Q(A1)
Read
Q(A2)
DSEL
2Ý10
) Q(A
2Ý10
) Q(A
3Ý10 3Ý11
) Q(A )
Q(A1)
Q(A
) Q(A
)
Q(A
) Q(A
Note: Ý = XOR when LBO = high/ no connect; Ý = ADD when LBO = low.
BW[a:b] is don’t care.
12/ 2/ 02, v. 0.9.2 Advance Info
Alliance Semiconductor
16 of 21
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
