75V16F64GS16
DEVICE BUS OPERATIONS
OPERATION
(1,2)
Full Standby
Output Disable
(3)
Read from Flash
(4)
Write to Flash
Read from PSRAM
(5)
Write to PSRAM
CEf CE1r
CE CE1
CE2r
OE
WE
LBs
LB
UBs
UB
ISSI
DQ
7-
DQ
0
DQ
15
-DQ
8
RESET WP
WP/ACC
(7)
®
H
H
L
L
L
H
H
H
L
H
H
H
L
L
H
X
X
X
X
H
H
X
H
H
L
H
L
H
X
H
H
H
L
H
L
X
X
X
X
X
X
L
H
L
X
X
X
X
X
X
X
X
L
L
H
X
X
High-Z
High-Z
High-Z
D
OUT
D
IN
D
OUT
D
IN
High-Z
D
IN
X
High-Z
High-Z
High-Z
High-Z
D
OUT
D
IN
D
OUT
D
IN
D
IN
High-Z
X
High-Z
H
H
H
H
H
H
H
X
X
X
X
X
X
X
Temporary
Sector
Group Unprotection
(6)
Flash Hardware
Reset
Boot Block
Sector Write
Protection
PSRAM Power Down
(8)
X
X
X
H
X
H
X
X
X
X
V
ID
L
X
X
X
X
X
X
X
L
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
X
Legend : L = VIL, H = VIH, X = VIL or VIH. See “DC CHARACTERISTICS” for voltage levels.
Notes:
1. Other operations not indicated in this table are prohibited.
2. Do not apply
CEf
= VIL,
CE1r
= VIL and CE2r = VIH all at once.
3. PSRAM Output Disable condition should not be kept longer than 1 ms.
4.
WE
can be VIL if
OE
is VIL,
OE
at VIH initiates the write operations.
5. PSRAM Byte control at Read operation is not supported.
6. Also used for the extended sector group protections.
7. Protects “outermost” 2 ´ 8 Kbytes (4 words) on both ends of the boot block sectors.
8. Power Down mode can be entered from Standby state and all DQ pins are in High-Z state.
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
PRELIMINARY INFORMATION Rev. 00A
08/01/02
5
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
