IS61NLP12832B
IS61NLP12836B/IS61NVP12836B
IS61NLP25618A/IS61NVP25618A
READ/WRITE CYCLE SWITCHINg CHARACTERISTICS(1) (OverꢀOperatingꢀRange)
-250
Min.
-200
Min. Max.
Symbol
ꢀ fmaxꢀ
Parameter
Max.
250ꢀ
—ꢀ
—ꢀ
—ꢀ
2.6ꢀ
—ꢀ
—ꢀ
2.6ꢀ
2.8ꢀ
—ꢀꢀ
2.6ꢀ
—ꢀ
—ꢀ
—ꢀ
—ꢀ
—ꢀ
—ꢀ
—ꢀ
—ꢀ
—ꢀ
—ꢀ
—ꢀ
—ꢀ
2ꢀ
Unit
MHz
ns
ClockꢀFrequencyꢀ
—ꢀ
4.0ꢀ
1.7ꢀ
1.7ꢀ
—ꢀ
—ꢀ 200ꢀ
tk c ꢀ
tk h ꢀ
tk l ꢀ
tk q ꢀ
CycleꢀTimeꢀ
5ꢀ
2ꢀ
2ꢀ
—ꢀ
—ꢀ
—ꢀ
ClockꢀHighꢀTimeꢀ
ns
ClockꢀLowꢀTimeꢀ
ns
ClockꢀAccessꢀTimeꢀꢀ
—ꢀ 3.1ꢀ
1.5ꢀ —ꢀ
ns
(2)
tk q x ꢀ
tk q l Z (2,3)ꢀ
tk q h Z (2,3)ꢀ
to e q ꢀ
to e l Z (2,3)ꢀ
to e h Z (2,3)ꢀ
tA S ꢀ
ClockꢀHighꢀtoꢀOutputꢀInvalidꢀ
ClockꢀHighꢀtoꢀOutputꢀLow-Zꢀ
ClockꢀHighꢀtoꢀOutputꢀHigh-Zꢀꢀ
OutputꢀEnableꢀtoꢀOutputꢀValidꢀꢀ
OutputꢀEnableꢀtoꢀOutputꢀLow-Zꢀ
OutputꢀDisableꢀtoꢀOutputꢀHigh-Zꢀꢀ
AddressꢀSetupꢀTimeꢀꢀ
Read/WriteꢀSetupꢀTimeꢀꢀ
ChipꢀEnableꢀSetupꢀTimeꢀꢀ
ClockꢀEnableꢀSetupꢀTimeꢀ
AddressꢀAdvanceꢀSetupꢀTimeꢀꢀ
DataꢀSetupꢀTimeꢀ
0.8ꢀ
0.8ꢀ
—ꢀ
ns
1ꢀ
—ꢀ
ns
—ꢀ 3.0ꢀ
—ꢀ 3.1ꢀ
ns
—ꢀ
ns
0ꢀ
0ꢀꢀ
—ꢀ
ns
—ꢀ
—ꢀ 3.0ꢀ
1.4ꢀ —ꢀ
1.4ꢀ —ꢀ
1.4ꢀ —ꢀ
1.4ꢀ —ꢀ
1.4ꢀ —ꢀ
1.4ꢀ —ꢀ
0.4ꢀ —ꢀ
0.4ꢀ —ꢀ
0.4ꢀꢀ —ꢀ
0.4ꢀꢀ —ꢀ
0.4ꢀꢀ —ꢀ
0.4ꢀ —ꢀ
ns
1.2ꢀ
1.2ꢀ
1.2ꢀ
1.2ꢀ
1.2ꢀ
1.2ꢀ
0.3ꢀ
0.3ꢀ
0.3ꢀ
0.3ꢀ
0.3ꢀ
0.3ꢀ
—ꢀ
ns
tw S ꢀ
ns
tc e S ꢀ
ns
tS e ꢀ
ns
tA d V S ꢀ
td S ꢀ
ns
ns
tA h ꢀ
AddressꢀHoldꢀTimeꢀ
ns
th e
ClockꢀEnableꢀHoldꢀTimeꢀ
WriteꢀHoldꢀTimeꢀꢀ
ns
tw h ꢀ
ns
tc e h ꢀ
tA d V h ꢀ
td h ꢀ
ChipꢀEnableꢀHoldꢀTimeꢀꢀ
AddressꢀAdvanceꢀHoldꢀTimeꢀꢀ
DataꢀHoldꢀTimeꢀ
ns
ns
ns
tP d S ꢀ
ZZꢀHighꢀtoꢀPowerꢀDownꢀꢀ
ZZꢀLowꢀtoꢀPowerꢀDownꢀꢀ
—ꢀꢀ
—ꢀꢀ
2ꢀ
2ꢀ
cyc
cyc
tP u S ꢀ
—ꢀ
2ꢀ
Notes:
1. Configuration signal MODE is static and must not change during normal operation.
2.ꢀ Guaranteedꢀbutꢀnotꢀ100%ꢀtested.ꢀThisꢀparameterꢀisꢀperiodicallyꢀsampled.
3.ꢀ TestedꢀwithꢀloadꢀinꢀFigureꢀ2.
Integrated Silicon Solution, Inc. — www.issi.com
17
Rev. D
09/10/07
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
