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IRLR024 参数 Datasheet PDF下载

IRLR024图片预览
型号: IRLR024
PDF下载: 下载PDF文件 查看货源
内容描述: 5位可编程同步降压,非同步,可调​​LDO至200mA内置的LDO [5-BIT PROGRAMMABLE SYNCHRONOUS BUCK, NON-SYNCHRONOUS,ADJUSTABLE LDO AND 200mA ON-BOARD LDO]
分类和应用:
文件页数/大小: 17 页 / 101 K
品牌: INFINEON [ Infineon ]
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IRU3007  
PIN#  
PIN SYMBOL  
PIN DESCRIPTION  
10  
Fb2  
This pin provides the feedback for the non-synchronous switching regulator. A resistor  
divider is connected from this pin to VOUT2 and ground that sets the output voltage. The  
value of the resistor connected from VOUT2 to Fb2 must be less than 100.  
5V supply voltage. A high frequency capacitor (0.1 to 1µF) must be placed close to this  
pin and connected from this pin to the ground plane for noise free operation.  
This pin provides the soft-start for the 2 switching regulators. An internal resistor charges  
an external capacitor that is connected from 5V supply to this pin which ramps up the  
outputs of the switching regulators, preventing the outputs from overshooting as well as  
limiting the input current. The second function of the Soft-Start cap is to provide long off  
time (HICCUP) for the synchronous MOSFET during current limiting.  
11  
12  
V5  
SS  
13  
Fault / Rt  
This pin has dual function. It acts as an output of the OVP circuitry or it can be used to  
program the frequency using an external resistor. When used as a fault detector, if any of  
the switcher outputs exceed the OVP trip point, the Fault pin switches to 12V and the  
soft-start cap is discharged. If the Fault pin is to be connected to any external circuitry,  
it needs to be buffered as shown in the application circuit.  
14  
15  
Fb4  
VSEN2  
This pin provides the feedback for the internal LDO regulator that its output is VOUT4.  
This pin is connected to the output of the I/O switching regulator. It is an input that  
provides sensing for the Under/Over-voltage circuitry for the I/O supply as well as the  
power for the internal LDO regulator.  
16  
17  
18  
19  
20  
21  
VOUT4  
Gnd  
Gate3  
Fb3  
NC  
Fb1  
This pin is the output of the internal LDO regulator.  
This pin serves as the ground pin and must be connected directly to the ground plane.  
This pin controls the gate of an external transistor for the 1.5V GTL+ linear regulator.  
This pin provides the feedback for the linear regulator that its output drive is Gate3.  
No connection.  
This pin provides the feedback for the synchronous switching regulator. Typically this pin  
can be connected directly to the output of the switching regulator. However, a resistor  
divider is recommended to be connected from this pin to VOUT1 and ground to adjust the  
output voltage for any drop in the output voltage that is caused by the trace resistance.  
The value of the resistor connected from VOUT1 to Fb1 must be less than 100.  
This pin is internally connected to the undervoltage and overvoltage comparators sensing  
the Vcore status. It must be connected directly to the Vcore supply.  
This pin is connected to the Drain of the power MOSFET of the Core supply and it  
provides the positive sensing for the internal current sensing circuitry. An external resis-  
tor programs the CS threshold depending on the RDS of the power MOSFET. An external  
capacitor is placed in parallel with the programming resistor to provide high frequency  
noise filtering.  
22  
23  
VSEN1  
OCSet1  
24  
PGnd  
This pin serves as the Power ground pin and must be connected directly to the ground  
plane close to the source of the synchronous MOSFET. A high frequency capacitor  
(typically 1µF) must be connected from V12 pin to this pin for noise free operation.  
Output driver for the synchronous power MOSFET for the Core supply.  
This pin is connected to the Source of the power MOSFET for the Core supply and it  
provides the negative sensing for the internal current sensing circuitry.  
25  
26  
LGate1  
Phase1  
27  
28  
UGate1  
V12  
Output driver for the high-side power MOSFET for the Core supply.  
This pin is connected to the 12V supply and serves as the power Vcc pin for the output  
drivers. A high frequency capacitor (typically 1µF) must be placed close to this pin and  
PGnd pin and be connected directly from this pin to the ground plane for noise free  
operation.  
Rev. 2.1  
08/20/02  
www.irf.com  
5
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