IRL3103
15
12
9
3000
I
D
= 34A
V
= 0V,
f = 1MHz
C
GS
C
= C + C
SHORTED
ds
iss
gs
gd ,
gd
C
= C
gd
rss
2500
2000
1500
1000
500
C
= C + C
oss
ds
V
V
= 24V
= 15V
DS
DS
C
iss
C
oss
6
3
C
rss
FOR TEST CIRCUIT
SEE FIGURE 13
0
0
1
10
100
0
10
20
30
40
V
, Drain-to-Source Voltage (V)
Q
, Total Gate Charge (nC)
DS
G
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
100
10
1
°
T = 175 C
J
100µsec
1msec
°
T = 25 C
J
Tc = 25°C
Tj = 175°C
Single Pulse
10msec
V
= 0 V
GS
2.0
1
0.1
0.0
0.4
V
0.8
1.2
1.6
2.4
1
10
, Drain-toSource Voltage (V)
100
,Source-to-Drain Voltage (V)
SD
V
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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