IRF/B/S/SL3206PbF
Symbol
V
(BR)DSS
R
DS(on)
V
GS(th)
I
DSS
I
GSS
R
G
Static @ T
J
= 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
Min. Typ. Max. Units
60
–––
–––
2.0
–––
–––
–––
–––
–––
–––
0.07
2.4
–––
–––
–––
–––
–––
0.7
–––
–––
3.0
4.0
20
250
100
-100
–––
Ω
nA
V
Conditions
V
GS
= 0V, I
D
= 250µA
∆V
(BR)DSS
/∆T
J
Breakdown Voltage Temp. Coefficient
V/°C Reference to 25°C, I
D
= 5mAd
mΩ V
GS
= 10V, I
D
= 75A
g
V
µA
V
DS
= V
GS
, I
D
= 150µA
V
DS
=60V, V
GS
= 0V
V
DS
= 48V, V
GS
= 0V, T
J
= 125°C
V
GS
= 20V
V
GS
= -20V
Dynamic @ T
J
= 25°C (unless otherwise specified)
Symbol
gfs
Q
g
Q
gs
Q
gd
Q
sync
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Q
g
- Q
gd
)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min. Typ. Max. Units
210
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
120
29
35
85
19
82
55
83
6540
720
360
1040
1230
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
pF
ns
–––
170
–––
S
nC
I
D
= 75A
V
DS
=30V
V
GS
= 10V
g
Conditions
V
DS
= 50V, I
D
= 75A
I
D
= 75A, V
DS
=0V, V
GS
= 10V
V
DD
= 30V
I
D
= 75A
R
G
=2.7Ω
V
GS
= 10V
g
V
GS
= 0V
V
DS
= 50V
ƒ = 1.0MHz, See Fig.5
V
GS
= 0V, V
DS
= 0V to 48V
i,
See Fig.11
V
GS
= 0V, V
DS
= 0V to 48V
h
C
oss
eff. (ER) Effective Output Capacitance (Energy Related) –––
C
oss
eff. (TR) Effective Output Capacitance (Time Related)h –––
Diode Characteristics
Symbol
I
S
I
SM
V
SD
t
rr
Q
rr
I
RRM
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
d
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
Forward Turn-On Time
Min. Typ. Max. Units
–––
–––
–––
–––
–––
–––
–––
–––
––– 210c
–––
–––
33
37
41
53
2.1
840
1.3
50
56
62
80
–––
A
nC
A
A
V
ns
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
T
J
= 25°C, I
S
= 75A, V
GS
= 0V
g
T
J
= 25°C
T
J
= 125°C
T
J
= 25°C
T
J
= 125°C
T
J
= 25°C
V
R
= 51V,
I
F
= 75A
di/dt = 100A/µs
g
G
S
D
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Calculated continuous current based on maximum allowable junction
temperature. Package limitation current is 75A
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by T
Jmax
, starting T
J
= 25°C, L = 0.07mH
R
G
= 25Ω, I
AS
= 75A, V
GS
=10V. Part not recommended for use
above this value.
I
SD
≤
75A, di/dt
≤
360A/µs, V
DD
≤
V
(BR)DSS
, T
J
≤
175°C.
Pulse width
≤
400µs; duty cycle
≤
2%.
C
oss
eff. (TR) is a fixed capacitance that gives the same charging time
as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
C
oss
eff. (ER) is a fixed capacitance that gives the same energy as
C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
mended footprint and soldering techniques refer to application note #AN-994.
R
θ
is measured at T
J
approximately 90°C
2
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