(
)
IR2136(2)(3)(5)(6)(7)(8)
J&S) & (PbF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters
are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board
mounted and still air conditions.
Symbol
Definition
Min.
Max.
Units
V
High side offset voltage
V
- 25
V
V
+ 0.3
B1,2,3
S
B1,2,3
V
High side floating supply voltage
High side floating output voltage
Low side and logic fixed supply voltage
Logic ground
-0.3
625
+ 0.3
B1,2,3
BS
HO
CC
V
V
V
- 0.3
S1,2,3
-0.3
25
V
V
- 25
V
+ 0.3
SS
LO1,2,3
CC
CC
V
V
Low side output voltage
-0.3
V
+ 0.3
CC
V
IN
Input voltage LIN,HIN,ITRIP, EN, RCIN
V
SS
- 0.3
lower of
(V + 15) or
SS
V
+ 0.3)
+ 0.3
CC
V
FLT
FAULT output voltage
V
SS
- 0.3
V
CC
dV/dt
Allowable offset voltage slew rate
—
50
V/ns
W
P
Package power dissipation @ T ≤ +25°C (28 lead PDIP)
—
—
—
—
—
—
—
-55
—
1.5
1.6
2.0
83
D
A
(28 lead SOIC)
(44leadPLCC)
Rth
Thermal resistance, junction to ambient
(28 lead PDIP)
(28 lead SOIC)
(44 lead PLCC)
JA
78
°C/W
°C
63
T
J
Junction temperature
150
150
300
T
Storage temperature
S
T
L
Lead temperature (soldering, 10 seconds)
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recom-
mended conditions. All voltage parameters are absolute referenced to COM. The V offset rating is tested with all supplies
S
biased at 15V differential.
Symbol
Definition
Min.
Max.
Units
V
High side floating supply voltage
IR2136(8)
IR21362
V
+10
V
+20
B1,2,3
S1,2,3
S1,2,3
V
S1,2,3
+11.5
+12
V
S1,2,3
+20
+20
IR2136(3)(5)(6)(7)
V
S1,2,3
V
S1,2,3
600
V
S1,2,3
High side floating supply offset voltage
High side output voltage
Note 1
V
V
V
B1,2,3
HO1,2,3
S1,2,3
0
V
Low side output voltage
V
CC
LO1,2,3
V
V
Low side and logic fixed supply voltage
IR2136(8)
IR21362
10
20
20
20
5
CC
11.5
12
IR2136(3)(5)(6)(7)
V
Logic ground
-5
SS
V
FAULT output voltage
RCIN input voltage
V
V
V
FLT
SS
SS
CC
CC
V
V
RCIN
Note 1: Logic operational for V of COM -5V to COM +600V. Logic state held for V of COM -5V to COM -V
.
S
S
BS
(Please refer to the Design Tip DT97-3 for more details).
Note 2: All input pins and the ITRIP pin are internally clamped with a 5.2V zener diode.
2
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