ISL6443
Input Voltage Range
VIN
The ISL6443 is designed to operate from input supplies
ranging from 4.5V to 24V. However, the input voltage range
can be effectively limited by the available maximum duty
VCC_5V
BOOT
cycle (D
= 93%).
MAX
V
+ V
0.93
OUT
d1
--------------------------------
+ V – V
d2 d1
V
=
IN(min)
UGATE
PHASE
where,
Vd1 = Sum of the parasitic voltage drops in the inductor
discharge path, including the lower FET, inductor and PC
board.
ISL6443
Vd2 = Sum of the voltage drops in the charging path,
including the upper FET, inductor and PC board resistances.
FIGURE 15.
The maximum input voltage and minimum output voltage is
At start-up the low-side MOSFET turns on and forces
PHASE to ground in order to charge the BOOT capacitor to
5V. After the low-side MOSFET turns off, the high-side
MOSFET is turned on by closing an internal switch between
BOOT and UGATE. This provides the necessary gate-to-
source voltage to turn on the upper MOSFET, an action that
boosts the 5V gate drive signal above VIN. The current
required to drive the upper MOSFET is drawn from the
internal 5V regulator.
limited by the minimum on-time (t
).
ON(min)
V
OUT
---------------------------------------------------
V
≤
IN(max)
t
× 300kHz
ON(min)
where, t
= 30ns
ON(min)
Gate Control Logic
The gate control logic translates generated PWM signals
into gate drive signals providing amplification, level shifting
and shoot-through protection. The gate drivers have some
circuitry that helps optimize the ICs performance over a wide
range of operational conditions. As MOSFET switching
times can vary dramatically from type to type and with input
voltage, the gate control logic provides adaptive dead time
by monitoring real gate waveforms of both the upper and the
lower MOSFETs. Shoot-through control logic provides a
20ns deadtime to ensure that both the upper and lower
MOSFETs will not turn on simultaneously and cause a shoot-
through condition.
Protection Circuits
The converter output is monitored and protected against
overload, short circuit and undervoltage conditions. A
sustained overload on the output sets the PGOOD low and
initiates hiccup mode.
Overcurrent Protection
Both PWM controllers use the lower MOSFET’s on-
resistance, r
, to monitor the current in the converter.
DS(ON)
The sensed voltage drop is compared with a threshold set by
a resistor connected from the OCSETx pin to ground.
Gate Drivers
(7)(R
)
CS
The low-side gate driver is supplied from VCC_5V and
provides a peak sink/source current of 400mA. The high-
side gate driver is also capable of 400mA current. Gate-drive
voltages for the upper N-Channel MOSFET are generated
by the flying capacitor boot circuit. A boot capacitor
connected from the BOOT pin to the PHASE node provides
power to the high side MOSFET driver. To limit the peak
current in the IC, an external resistor may be placed
between the UGATE pin and the gate of the external
MOSFET. This small series resistor also damps any
oscillations caused by the resonant tank of the parasitic
inductances in the traces of the board an the FET’s input
capacitance.
------------------------------------------
R
=
OCSET
(I )(R
)
OC
DS(on)
where, I
is the desired overcurrent protection threshold,
OC
and R
is a value of the current sense resistor connected
CS
to the ISENx pin. If an overcurrent is detected for 2
consecutive clock cycles then the IC enters a hiccup mode
by turning off the gate drivers and entering into soft-start.
The IC will cycle 2 times through soft-start before trying to
restart. The IC will continue to cycle through soft-start until
the overcurrent condition is removed. Hiccup mode is active
during soft-start so care must be taken to ensure that the
peak inductor current does not exceed the overcurrent
threshold during soft-start.
Because of the nature of this current sensing technique, and
to accommodate a wide range of r
variations, the
DS(ON)
value of the overcurrent threshold should represent an
overload current about 150% to 180% of the maximum
operating current. If more accurate current protection is
FN9044.1
October 4, 2005
12
INTERSIL [ Intersil ]
