ICL7660, ICL7660A
Typical Performance Curves (Test Circuit of Figure 11) (Continued)
+2
+1
0
100
90
80
70
60
50
40
30
20
10
0
20.0
18.0
16.0
14.0
12.0
10.0
8.0
T
= 25°C
A
V+ = 2V
I+
P
EFF
6.0
-1
-2
4.0
T
= 25°C
SLOPE 150Ω
A
2.0
V+ = 2V
4.5 6.0
LOAD CURRENT I (mA)
0
0
1.5
3.0
7.5
9.0
0
1
2
3
4
5
6
7
8
LOAD CURRENT I (mA)
L
L
FIGURE 9. OUTPUT VOLTAGE AS A FUNCTION OF OUTPUT
CURRENT
FIGURE 10. SUPPLY CURRENT AND POWER CONVERSION
EFFICIENCY AS A FUNCTION OF LOAD
CURRENT
NOTE:
6. These curves include in the supply current that current fed directly into the load R from the V+ (See Figure 11). Thus, approximately half the
L
supply current goes directly to the positive side of the load, and the other half, through the ICL7660/ICL7660A, to the negative side of the load.
Ideally, V
∼ 2V , I ∼ 2I , so V x I ∼ V
x I .
OUT L
OUT
IN
S
L
IN
S
I
V+
S
(+5V)
1
8
7
6
5
2
3
4
I
ICL7660
L
C
10µF
+
1
ICL7660A
-
R
L
C
OSC
(NOTE)
-V
OUT
-
+
C
2
10µF
NOTE: For large values of C
(>1000pF) the values of C and C2 should be increased to 100µF.
OSC
1
FIGURE 11. ICL7660, ICL7660A TEST CIRCUIT
In the ICL7660 and ICL7660A, the 4 switches of Figure 12
are MOS power switches; S is a P-Channel device and S ,
Detailed Description
1
2
The ICL7660 and ICL7660A contain all the necessary
circuitry to complete a negative voltage converter, with the
exception of 2 external capacitors which may be inexpensive
10µF polarized electrolytic types. The mode of operation of
the device may be best understood by considering Figure
12, which shows an idealized negative voltage converter.
S and S are N-Channel devices. The main difficulty with
3
4
this approach is that in integrating the switches, the
substrates of S and S must always remain reverse biased
3
4
with respect to their sources, but not so much as to degrade
their “ON” resistances. In addition, at circuit start-up, and
under output short circuit conditions (V
= V+), the output
OUT
Capacitor C is charged to a voltage, V+, for the half cycle
1
voltage must be sensed and the substrate bias adjusted
accordingly. Failure to accomplish this would result in high
power losses and probable device latchup.
when switches S and S are closed. (Note: Switches S
1
3
2
and S are open during this half cycle.) During the second
4
half cycle of operation, switches S and S are closed, with
2
4
S and S open, thereby shifting capacitor C negatively by
This problem is eliminated in the ICL7660 and ICL7660A by a
1
3
1
V+ volts. Charge is then transferred from C to C such that
logic network which senses the output voltage (V
) together
1
2
OUT
the voltage on C is exactly V+, assuming ideal switches and
2
with the level translators, and switches the substrates of S and
3
no load on C . The ICL7660 approaches this ideal situation
2
S to the correct level to maintain necessary reverse bias.
4
more closely than existing non-mechanical circuits.
FN3072.7
6
October 10, 2005
INTERSIL [ Intersil ]
