ICL7660, ICL7660A
V+
V+
V
=
- O(nUVT - V
)
FDX
IN
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
C
OSC
-
+
ICL7660
ICL7660
C
3
D
+
-
1
ICL7660A
+
-
C
ICL7660A
1
C
1
V
OUT
-
+
V
= (2V+) -
C
OUT
FD1
2
D
2
(V
) - (V
)
FD2
+
-
+
C
C
4
2
FIGURE 18. LOWERING OSCILLATOR FREQUENCY
-
Positive Voltage Doubling
FIGURE 20. COMBINED NEGATIVE VOLTAGE CONVERTER
AND POSITIVE DOUBLER
The ICL7660 and ICL7660A may be employed to achieve
positive voltage doubling using the circuit shown in Figure
19. In this application, the pump inverter switches of the
Voltage Splitting
The bidirectional characteristics can also be used to split a
ICL7660 and ICL7660A are used to charge C to a voltage
1
higher supply in half, as shown in Figure 21. The combined
load will be evenly shared between the two sides. Because
the switches share the load in parallel, the output impedance
is much lower than in the standard circuits, and higher
currents can be drawn from the device. By using this circuit,
and then the circuit of Figure 16, +15V can be converted (via
+7.5, and -7.5) to a nominal -15V, although with rather high
series output resistance (~250Ω).
level of V+ -V (where V+ is the supply voltage and V is the
F
F
forward voltage drop of diode D ). On the transfer cycle, the
1
voltage on C plus the supply voltage (V+) is applied through
1
diode D to capacitor C . The voltage thus created on C
2
2
2
becomes (2V+) - (2VF) or twice the supply voltage minus the
combined forward voltage drops of diodes D and D .
1
2
The source impedance of the output (V
) will depend on
OUT
the output current, but for V+ = 5V and an output current of
10mA it will be approximately 60Ω.
V+
+
V+
50µF
R
L1
1
2
3
4
8
7
6
5
-
1
2
3
4
8
7
6
5
D
1
2
ICL7660
V+ - V-
2
V
=
OUT
ICL7660A
V
=
ICL7660
OUT
+
ICL7660A
D
(2V+) - (2V )
F
50µF
R
-
L2
+
-
+
-
+
C
C
2
1
50µF
-
V -
FIGURE 19. POSITIVE VOLT DOUBLER
FIGURE 21. SPLITTING A SUPPLY IN HALF
Combined Negative Voltage Conversion
and Positive Supply Doubling
Regulated Negative Voltage Supply
In some cases, the output impedance of the ICL7660 and
ICL7660A can be a problem, particularly if the load current
varies substantially. The circuit of Figure 22 can be used to
overcome this by controlling the input voltage, via an ICL7611
low-power CMOS op amp, in such a way as to maintain a
nearly constant output voltage. Direct feedback is inadvisable,
since the ICL7660s and ICL7660As output does not respond
instantaneously to change in input, but only after the switching
delay. The circuit shown supplies enough delay to
Figure 20 combines the functions shown in Figures 13 and
Figure 19 to provide negative voltage conversion and
positive voltage doubling simultaneously. This approach
would be, for example, suitable for generating +9V and -5V
from an existing +5V supply. In this instance capacitors C
1
and C perform the pump and reservoir functions
3
respectively for the generation of the negative voltage, while
capacitors C and C are pump and reservoir respectively
2
4
for the doubled positive voltage. There is a penalty in this
configuration which combines both functions, however, in
that the source impedances of the generated supplies will be
somewhat higher due to the finite impedance of the common
charge pump driver at pin 2 of the device.
accommodate the ICL7660 and ICL7660A, while maintaining
adequate feedback. An increase in pump and storage
capacitors is desirable, and the values shown provides an
output impedance of less than 5Ω to a load of 10mA.
FN3072.7
10
October 10, 2005
INTERSIL [ Intersil ]
