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AD7523JN 参数 Datasheet PDF下载

AD7523JN图片预览
型号: AD7523JN
PDF下载: 下载PDF文件 查看货源
内容描述: 8位乘法D / A转换器 [8-Bit, Multiplying D/A Converters]
分类和应用: 转换器光电二极管
文件页数/大小: 9 页 / 102 K
品牌: INTERSIL [ INTERSIL CORPORATION ]
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AD7523, AD7533
Electrical Specifications
V+ = +15V, V
REF
= +10V, V
OUT1
= V
OUT2
= 0V, Unless Otherwise Specified
(Continued)
AD7523
T
A
25
o
C
PARAMETER
ANALOG OUTPUT
Output Capacitance
C
OUT1
All Digital Inputs High
(Note 4)
C
OUT2
C
OUT1
All Digital Inputs Low
(Note 4)
C
OUT2
DIGITAL INPUTS
Low State Threshold, V
IL
High State Threshold, V
IH
Input Current (Low or High),
I
IL
, I
IH
Input Coding
Input Capacitance
V
IN
= 0V or + 15V
See Tables 1 and 3
(Note 4)
-
-
2,4
-
0.8
-
±1
-
2,4
-
0.8
-
±1
-
2.4
-
0.8
-
±1
-
2.4
-
0.8
-
±1
V
V
µA
-
-
-
-
100
30
30
100
-
-
-
-
100
30
30
100
-
-
-
-
100
35
35
100
-
-
-
-
100
35
35
100
pF
pF
pF
pF
TEST CONDITIONS
MIN
MAX
T
A
MIN-MAX
MIN
MAX
AD7533
T
A
25
o
C
MIN
MAX
T
A
MIN-MAX
MIN
MAX
UNITS
Binary/Offset Binary
4
-
4
-
Binary/Offset Binary
4
-
4
pF
POWER SUPPLY CHARACTERISTICS
Power Supply Voltage Range
I+
(Note 6)
All Digital Inputs High or
Low (Excluding Ladder
Network)
-
+5 to +16
2
-
2.5
-
+5 to +16
2
-
2.5
V
mA
NOTES:
2. Full Scale Range (FSR) is 10V for unipolar and
±10V
for bipolar modes.
3. Using internal feedback resistor, R
FEEDBACK
.
4. Guaranteed by design or characterization and not production tested.
5. Accuracy not guaranteed unless outputs at ground potential.
6. Accuracy is tested and guaranteed at V+ = +15V, only.
Definition of Terms
Nonlinearity:
Error contributed by deviation of the DAC
transfer function from a “best straight line” through the actual
plot of transfer function. Normally expressed as a
percentage of full scale range or in (sub)multiples of 1 LSB.
Resolution:
It is addressing the smallest distinct analog
output change that a D/A converter can produce. It is
commonly expressed as the number of converter bits. A
converter with resolution of n bits can resolve output changes
of 2
-N
of the full-scale range, e.g., 2
-N
V
REF
for a unipolar
conversion. Resolution by no means implies linearity.
Settling Time:
Time required for the output of a DAC to
settle to within specified error band around its final value
(e.g.,
1
/
2
LSB) for a given digital input change, i.e., all digital
inputs LOW to HIGH and HIGH to LOW.
Gain Error:
The difference between actual and ideal analog
output values at full-scale range, i.e., all digital inputs at
HIGH state. It is expressed as a percentage of full scale
range or in (sub)multiples of 1 LSB.
Feedthrough Error:
Error caused by capacitive coupling
from V
REF
to I
OUT1
with all digital inputs LOW.
Output Capacitance:
Capacitance from I
OUT1
, and I
OUT2
terminals to ground.
Output Leakage Current:
Current which appears on
I
OUT1
, terminal when all digital inputs are LOW or on I
OUT2
terminal when all digital inputs are HIGH.
For further information on the use of this device, see the
following Application Notes:
NOTE #
AN002
DESCRIPTION
“Principles of Data Acquisition and
Conversion”
“Do’s and Don’ts of Applying A/D
Converters”
“Interpretation of Data Conversion
Accuracy Specifications”
AnswerFAX
DOC. #
9002
AN018
9018
AN042
9042
10-10