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12103D226KAT2A 参数 Datasheet PDF下载

12103D226KAT2A图片预览
型号: 12103D226KAT2A
PDF下载: 下载PDF文件 查看货源
内容描述: 双路15A / 30A单降压型电源模块 [Dual 15A/Single 30A Step-Down Power Module]
分类和应用: 电源电路电容器PC
文件页数/大小: 28 页 / 1136 K
品牌: INTERSIL [ INTERSIL CORPORATION ]
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ISL8225M
Absolute Maximum Ratings
Input Voltage, V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +25V
Driver Bias Voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6.5V
Phase Voltage, V
PHASE
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +30V
Input, Output or I/O Control Voltage . . . . . . . . . . . . . . . -0.3V to V
CC
+ 0.3V
ESD Rating
Human Body Model (Tested per JESD22-A114E) . . . . . . . . . . . . . . . . 2kV
Machine Model (Tested per JESD22-A115-A) . . . . . . . . . . . . . . . . . 200V
Charge Device Model (Tested per JESD22-C101C). . . . . . . . . . . . . . . 1kV
Latch-up (Tested per JESD-78B; Class 2, Level A) . . . . . . . . . . . . . . 100mA
Thermal Information
Thermal Resistance (Typical)
θ
JA
(°C/W)
θ
JC
(°C/W)
QFN Package (Notes 5, 6) . . . . . . . . . . . . . .
10.0
0.9
Maximum Storage Temperature Range . . . . . . . . . . . . . .-55°C to +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . Refer to Figure 41
Recommended Operating Conditions
Input Voltage, V
IN1
and V
IN2
. . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5V to 20.0V
Output Voltage, V
OUT1
and V
OUT2
. . . . . . . . . . . . . . . . . . . . . . . 0.6V to 6.0V
Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
5.
θ
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief
6. For
θ
JC
, the “case temp” location is the center of the phase exposed metal pad on the package underside.
Electrical Specifications
range, -40°C to +125°C (Note 4).
PARAMETER
T
A
= +25°C, V
IN
= 12V, unless otherwise noted. Boldface limits apply over the internal junction temperature
MIN
TYP
(Note 7) (Note 8)
MAX
(Note 7)
SYMBOL
TEST CONDITIONS
UNITS
VCC SUPPLY CURRENT
Nominal Supply V
IN
Current
I
Q_VIN
V
IN
= 20V; No Load; EN1 = EN2 = high
V
IN1
= 20V; No Load; EN1 = high, EN2 = low
V
IN2
= 20V; No Load; EN1 = 0, EN2 = high
V
IN1
= 12V; No Load; EN1 = high, EN2 = high
V
IN
= 4.5V; No Load; EN1 = EN2 = high
V
IN1
= 4.5V; No Load; EN1 = high, EN2 = low
V
IN2
= 4.5V; No Load; EN1 = 0, EN2 = high
131
72
71
134
136
73
70
mA
mA
mA
mA
mA
mA
mA
INTERNAL LINEAR REGULATOR (Note 9)
Maximum Current
Saturated Equivalent Impedance
VCC Voltage Level
I
PVCC
R
LDO
VCC
V
CC
= 4V to 5.6V
P-Channel MOSFET (V
IN
= 5V)
I
VCC
= 0mA
0°C to +75°C
-40°C to +85°C
Falling VCC Threshold
System Soft-start Delay
t
SS_DLY
After PLL and V
CC
PORs, and EN above their
thresholds
5.15
250
1
5.4
5.95
mA
V
POWER-ON RESET (Note 9)
Rising VCC Threshold
2.85
2.85
2.65
384
2.97
3.05
2.75
V
V
V
Cycles
ENABLE (Note 9)
Turn-On Threshold Voltage
Hysteresis Sink Current
Under-voltage Lockout Hysteresis
Sink Current
Sink Impedance
I
EN_HYS
V
EN_HYS
I
EN_SINK
R
EN_SINK
f
OSC
V
EN_RTH
= 10.6V; V
EN_FTH
= 9V, R
UP
= 53.6kΩ,
R
DOWN
= 5.23kΩ
V
ENFF
= 1V
I
EN_SINK
= 5mA, V
ENFF
= 1V
SYNC pin is open
510
15.4
64
0.75
23
0.8
30
1.6
0.86
35
V
µA
V
mA
OSCILLATOR
Oscillator Frequency
kHz
6
FN7822.1
January 31, 2013