01/99
xi
IFPA300, IFPA301
Monolithic JFET Preamplifier
Input FET J1 selected to the
following elecrical parameters.
Parameter
BV
GSS
I
GSS
I
DSS
V
GS(OFF)
G
M
V
GSF
Conditions
Vds = 0, Ig = 1 µA
Vds = 0, Vgs = – 10 V
Vds = 0, Vgs = 10 V
Vds = 0, Id = 1 µA
Vgs = 0, Vds = 10 V
Id = 1 µA
40
1
50
0.35
0.65
Min
– 25
2
500
2
Max
Units
Volts
nA
mA
Volts
mM
Volts
Bias 2
Bias 1
V
DD
= +12 V
DUT
120K
Test Circuit Reference
Parameter
VDCout
Vin
VACout
VACout
Conditions
Vdd = 12 V, – VS = – 6 V
Test pt #1
Vdd = 12 V, – VS = – 6 V
Test pt #2
Vdd = 12 V, – VS = – 6 V
t = O µsec
Vdd = 12 V, – VS = – 6 V
t = 100 µsec
Min
6
– 0.6
50
20
Max
10
– 1.6
Units
V
Input
20K
V
mV
mV
10pF
AC
Input
0.165 (4.19)
0.185 (4.70)
0.335 (8.51)
0.370 (9.40)
0.305 (7.75)
0.335 (8.51)
0.010 (0.25)
0.040 (1.02)
8 Leads - Dia.
0.029 (0.74)
0.045 (1.14)
0.200 (5.08)
Basic
8 7 6 5
Top
1 2 3 4
0.158 (4.01) 0.228 (5.79)
0.150 (3.81)
0.028 (0.71)
0.050 (1.27)
0.022 (0.56)
0.018 (0.046
IFPA300 uses TO-99 Package
Dimensions in Inches (mm)
IFPA301 uses SOIC-8 Package
Dimensions in Inches (mm)
Pin Configuration
1 Bias 3, 2 VSS, 3 Bias 1, 4 VDD /Substrate
5 Open Drain Output, 6 Open Source Output, 7 Bias 2, 8 Input
Pin Configuration
1 Bias 2, 2 Input, 3 Bias 3, 4 VSS, 5 Bias 1, 6 VDD/Substrate
7 Open Drain Output, 8 Open Source Output
www.interfet.com
1000 N. Shiloh Road, Garland, TX 75042
(972) 487-1287
FAX
(972) 276-3375
INTERFET [ INTERFET CORPORATION ]
