8XC52/54/58
PROGRAMMING THE EPROM
DEFINITION OF TERMS
The part must be running with a 4 MHz to 6 MHz
oscillator. The address of an EPROM location to be
programmed is applied to address lines while the
code byte to be programmed in that location is ap-
plied to data lines. Control and program signals must
be held at the levels indicated in Table 4. Normally
ADDRESS LINES: P1.0–P1.7, P2.0–P2.5 respec-
tively for A0–A13.
DATA LINES: P0.0–P0.7 for D0–D7.
CONTROL SIGNALS: RST, PSEN, P2.6, P2.7, P3.3,
P3.6, P3.7
EA/V is held at logic high until just before ALE/
PP
PROG is to be pulsed. The EA/V is raised to V
,
PP
is re-
PP
ALE/PROG is pulsed low and then EA/V
PROGRAM SIGNALS: ALE/PROG, EA/V
PP
PP
turned to a high (also refer to timing diagrams).
NOTES:
Exceeding the V maximum for any amount of
#
PP
time could damage the device permanently. The
V source must be well regulated and free of
PP
glitches.
Table 4. EPROM Programming Modes
ALE/
EA/
Mode
RST
PSEN
P2.6
P2.7
P3.3
P3.6
P3.7
PROG
V
PP
Program Code Data
Verify Code Data
H
H
H
L
L
L
ß
H
12.75V
H
L
L
L
H
L
H
L
H
H
L
H
H
H
Program Encryption
Array Address 0–3FH
ß
12.75V
H
H
Program Lock
Bits
Bit 1
Bit 2
Bit 3
H
H
H
H
L
L
L
L
ß
ß
ß
H
12.75V
12.75V
12.75V
H
H
H
H
L
H
H
L
H
H
H
L
H
L
H
L
L
L
H
L
Read Signature Byte
L
19
INTEL [ INTEL ]
