3 Volt Intel® Advanced+ Boot Block Flash Memory Stacked-CSP Family
Appendix H Ordering Information
Table 33. Ordering Information for 0.25 µm and 0.18 µm
R D 2 8 F 3 2 0 8 C 3 T 7 0
Package
Access Speed (ns)
16 Mbit = 70, 90, 110
32 Mbit = 70, 90
RD = 8x12 Ball Matrix CSP
Product Line Designator
T = Top Blocking
B = Bottom Blocking
for all Intel
Flash products
Flash Density
320 = x16 (32 Mbit)
160 = x16 (16 Mbit)
Product Family
C3 = 3 V Advanced+ Boot Block
VCC = 2.7 V - 3.3 V
VPP = 1.65 V - 3.3 V or
11.4 V - 12.6 V
SRAM Device Density
8 = x16 (8 Mbit)
4 = x16 (4 Mbit)
2 = x16 (2 Mbit)
.
Table 34. Ordering Information for Combinations with 16M 0.13 µm Flash
R D 2 8 F 1 6 0 2 C 3 T D 7 0
Package
Access Speed (ns)
RD = Stacked-CSP
16 Mbit = 70 ns
Technology
Product Line Designator
38F = Intel
Flash Stacked Memory
Differentiator
D = 0.13µm
Flash Density
320 = x16 (32 Mbit)
160 = x16 (16 Mbit)
Parameter Location
T = Top Blocking
B = Bottom Blocking
SRAM Device Density
4 = x16 (4 Mbit)
2 = x16 (2 Mbit)
Product Family
C = Advanced+ Boot Block
Flash Memory
Datasheet
69
INTEL [ INTEL ]
