28F640L30, 28F128L30, 28F256L30
When a block erase operation is executing, issuing the Erase Suspend command requests the WSM
to suspend the erase algorithm at predetermined points. The partition that is suspended continues to
output Status Register data after the Erase Suspend command is issued. Block erase is suspended
when Status Register bits SR[7,6] are set. Suspend latency is specified in Section 12.3, “Program
and Erase Characteristics” on page 64.
To read data from blocks within the suspended partition (other than an erase-suspended block), the
Read Array command must be issued to that partition first. During Erase Suspend, a Program
command can be issued to any block other than the erase-suspended block. Block erase cannot
resume until program operations initiated during erase suspend complete. Read Array, Read Status
Register, Read Device Identifier, CFI Query, and Erase Resume are valid commands during Erase
Suspend. Additionally, Clear Status Register, Program, Program Suspend, Block Lock, Block
Unlock, and Block Lock-Down are valid commands during Erase Suspend.
To read data from a block in a partition that is not erasing, the erase operation does not need to be
suspended. If the other partition is already in Read Array, Read Device Identifier, or CFI Query,
issuing a valid address returns corresponding data. If the other partition is not in a read state, one of
the read commands must be issued to the partition before data can be read.
During an erase suspend, deasserting CE# places the device in standby, reducing active current.
VPP must remain at a valid level, and WP# must remain unchanged while in erase suspend. If
RST# is asserted, the device is reset.
6.3
6.4
Erase Resume
The Erase Resume command instructs the device to continue erasing, and automatically clears
status register bits SR[7,6]. This command can be written to any partition. When read at the
partition that’s erasing, the device outputs data corresponding to the partition’s last state. If status
register error bits are set, the Status Register should be cleared before issuing the next instruction.
RST# must remain deasserted (see Figure 31, “Program Suspend/Resume Flowchart” on page 75).
Erase Protection
When VPP = VIL, absolute hardware erase protection is provided for all device blocks. If VPP is
below VPPLK, erase operations halt and SR[3] is set indicating a VPP-level error.
Datasheet
37
INTEL [ INTEL ]
