欢迎访问ic37.com |
会员登录 免费注册
发布采购

LXT9763HC 参数 Datasheet PDF下载

LXT9763HC图片预览
型号: LXT9763HC
PDF下载: 下载PDF文件 查看货源
内容描述: LAN收发器| HEX | QFP | 208PIN |塑料\n [LAN TRANSCEIVER|HEX|QFP|208PIN|PLASTIC ]
分类和应用: 网络接口电信集成电路电信电路局域网以太网:16GBASE-T
文件页数/大小: 74 页 / 973 K
品牌: INTEL [ INTEL ]
 浏览型号LXT9763HC的Datasheet PDF文件第30页浏览型号LXT9763HC的Datasheet PDF文件第31页浏览型号LXT9763HC的Datasheet PDF文件第32页浏览型号LXT9763HC的Datasheet PDF文件第33页浏览型号LXT9763HC的Datasheet PDF文件第35页浏览型号LXT9763HC的Datasheet PDF文件第36页浏览型号LXT9763HC的Datasheet PDF文件第37页浏览型号LXT9763HC的Datasheet PDF文件第38页  
LXT9763 Fast Ethernet 10/100 Hex Transceiver with Full MII  
The LXT9763 does not support fiber connections at 10 Mbps.  
1.11.1  
10T Preamble Handling  
The LXT9763 offers two options for preamble handling, selected by bit 16.5. In 10T Mode when  
16.5 = 0, the LXT9763 strips the entire preamble off of received packets. CRS is asserted  
coincident with SFD. RX_DV is held Low for the duration of the preamble. When RX_DV is  
asserted, the very first two nibbles driven by the LXT9763 are the SFD 5Dhex followed by the  
body of the packet.  
In 10T mode with 16.5 = 1, the LXT9763 passes the preamble through the MII and asserts RX_DV  
and CRS simultaneously. In 10T loopback, the LXT9763 loops back whatever the MAC transmits  
to it, including the preamble.  
1.11.2  
1.11.3  
1.11.4  
10T Carrier Sense  
For 10T links, CRS assertion is based on reception of valid preamble, and de-assertion on reception  
of an end-of-frame (EOF) marker. Bit 16.7 allows CRS de-assertion to be synchronized with  
RX_DV de-assertion. Refer to Table 47 on page 68.  
10T Dribble Bits  
The LXT9763 device handles dribbles bits in all modes. If between 1-4 dribble bits are received,  
the nibble is sent across the MII, padded with 1s if necessary. If between 5-7 dribble bits are  
received, the second nibble is not sent onto the MII bus.  
10T Link Test  
In 10T mode, the LXT9763 always transmit link pulses. If the Link Test function is enabled, it  
monitors the connection for link pulses. Once link pulses are detected, data transmission will be  
enabled and will remain enabled as long as either the link pulses or data transmission continue. If  
the link pulses stop, the data transmission will be disabled.  
If the Link Test function is disabled (Force Link Pass), the LXT9763 will transmit to the  
connection regardless of detected link pulses. The Link Test function can be disabled by setting bit  
16.14 = 1.  
1.11.4.1  
Link Test Failure  
Link Test failure occurs if Link Test is enabled and link pulses or packets stop being received. If  
this condition occurs, the LXT9763 returns to the auto-negotiation phase if auto-negotiation is  
enabled.  
10T Jabber  
If a transmission exceeds the jabber timer, the LXT9763 will disable the transmit and loopback  
functions. See 29 on page 55 for jabber timing parameters.  
The LXT9763 automatically exits jabber mode after the unjab time has expired. This function can  
be disabled by setting bit 16.10 = 1.  
34  
Datasheet