LXT974/LXT975 — Fast Ethernet 10/100 Quad Transceivers
Table 53. Interrupt Status Register (Address 18, Hex 12)
Bit
Name
Description
Type 1
Default
1 = Indicates MII interrupt pending.
18.15
MINT
RO
RO
N/A
0
0 = Indicates no MII interrupt pending. This bit is cleared by reading
Register 1 followed by reading Register 18.
18.14:0 Reserved
1. RO = Read Only
Ignore
Table 54. Port Configuration Register (Address 19, Hex 13)
Bit
Name
Description
Type 1
Default
19.15
Reserved
Write as 0; ignore on read.
R/W
N/A
1 = 100BASE-T transmit test enabled (Port transmits data regardless of
receive status).
Txmit Test
Enable
(100BASETX)
19.14
19.13
R/W
R/W
0
0 = Normal operation.
Reserved
Write as 0; ignore on read.
N/A
1 = Enable interrupt signaling on MDIO (if 17.1 = 1).
0 = Normal operation (MDIO Interrupt disabled).
19.12
19.11
MDIO_INT
R/W
R/W
0
0
Bit is ignored unless the interrupt function is enabled (17.1 = 1).
1 = Disable 10BT Loopback - Data transmitted by the MAC will not
loopback to the RXD and RX_DV pins. Only CRS is looped back.
TP Loopback
Enable
(10BASE-T)
0 = Enable 10BT Loopback - Preamble, SFD, and data are directly looped
back to the MII.
SQE Disable
(10BASE-T)
1 = Normal operation (SQE enabled).
0 = Disable SQE.
19.10
19.9
R/W
R/W
0
0
Jabber Disable
(10BASE-T)
1 = Disable jabber.
0 = Normal operation (jabber enabled).
Link Test
Enable
1 = Disable 10BASE-T link integrity test.
19.8
R/W
R/W
R/W
R/W
Note 2
N/A
0
0 = Normal operation (10BASE-T link integrity test enabled).
(10BASE-T)
Reserved
19.7:6
19.5
Write as 0; ignore on read.
1 = TX clock is advanced relative to TXD<3:0> and TX_ER by 1/2
TX_CLK cycle.
Advance TX
Clock
0 = Normal operation.
19.4
Reserved
Write as 0; ignore on read.
N/A
1. R/W = Read/Write
2. If auto-negotiation is disabled, the default value of bit 19.8 is determined by pin 115 (CFG_1). If CFG_1 is High, the default
value of
bit 19.8 = 1.
If CFG_1 is Low, the default value of bit 19.8 = 0. If auto-negotiation is enabled, the default value of bit 19.8 = 0.
3. The default value of bit 19.3 is determined by BYPSCR. If BYPSCR is High, the default value of bit 19.3 = 1.
If BYPSCR is Low, the default value of bit 19.3 = 0.
4. The default value of bit 19.2 is determined by the SD/TPn pin for the respective port.
If SD/TPn is tied Low, the default value of bit 19.2 = 0. If SD/TPn is not tied Low, the default value of bit 19.2 = 1.
On the LXT975, this bit is ignored on ports 0 and 2 that operate in twisted-pair mode only.
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Datasheet
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