Fast Ethernet 10/100 Quad Transceivers — LXT974/LXT975
Table 51. LED Configuration Register (Address 16, Hex 10)
Bit
Name
Description
Type 1
Default
Determine condition indicated by LED_2
bit 7
bit 6
Indication Setting
LEDn_2 indicates Link
0
0
1
1
0
1
0
1
16.7:6
LED_2 Select
R/W
0 0
LEDn_2 indicates Half-Duplex Status
LEDn_2 indicates 100 Mbps
LEDn_2 indicates Collision
Determine condition indicated by LED_1
bit 5
bit 4
Indication Setting
0
0
1
1
0
1
0
1
LEDn_1 indicates Receive Activity
LEDn_1 indicates Link
16.5:4
LED_1 Select
R/W
0 0
LEDn_1 indicates Half-Duplex Status
LEDn_1 indicates 100 Mbps
Determine condition indicated by LED_0
bit 3
bit 2
Indication Setting
0
0
1
1
0
1
0
1
LEDn_0 indicates Transmit Activity
LEDn_0 indicates Receive Activity
LEDn_0 indicates Link
16.3:2
LED_0 Select
R/W
0 0
LEDn_0 indicates Half-Duplex Status
1 = Enhanced link algorithm - Link goes down when 12 idle symbols in
a row are not received within 1 to 2 ms.
16.1
16.0
Link Algorithm
LED Extension
R/W
R/W
0
0
0 = Standard link algorithm - Link goes down when symbol error rate is
greater than 64/1024.
1 = Disable extension of LED active time for LEDn_<2:0>.
0 = Enable extension of LED active time for LEDn_<2:0>.
1. R/W = Read /Write
Table 52. Interrupt Enable Register (Address 17, Hex 11)
Bit
Name
Description
Type 1
Default
17.15:2 Reserved
Write as 0; ignore on read.
R/W
N/A
1 = Enable interrupts. Must be enabled for bit 17.0 or 19.12 to be effective.
0 = Disable interrupts.
17.1
17.0
INTEN
TINT
R/W
0
1 = Forces MDINT Low and sets bit 18.15 = 1. Also forces interrupt pulse
on MDIO when bit 19.12 = 1.
R/W
0
0 = Normal operation.
This bit is ignored unless the interrupt function is enabled (17.1 = 1).
1. R/W = Read /Write
Datasheet
69
INTEL [ INTEL ]
