Intel® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
Figure 9.
V
Power Filtering Diagram
CCPLL1
1.3 V
VCCPLL1
100 nF
Intel® IXP42X
Product Line /
Intel® IXC1100
Control Plane
Processor
10 nF
100 nF
VSS
VSS
B1680-03
5.2.2
V
Requirement
CCPLL2
A parallel combination of a 10-nF capacitor — for bypass — and a 200-nF capacitor — for a first-
order filter with a cut-off frequency below 30 MHz — must be connected to the V
IXP42X product line and IXC1100 control plane processors.
pin of the
CCPLL2
The ground of both capacitors should be connected to the nearest V supply pin. Both capacitors
SS
should be located less than 0.5 inch away from the V
pin and the associated V pin. In
CCPLL2
SS
order to achieve the 200-nF capacitance, a parallel combination of two 100-nF capacitors may be
used as long as the capacitors are placed directly beside each other.
Figure 10.
V
Power Filtering Diagram
CCPLL2
1.3 V
VCCPLL2
100 nF
Intel® IXP42X
Product Line /
Intel® IXC1100
Control Plane
Processor
10 nF
100 nF
VSS
VSS
B1681-03
5.2.3
V
Requirement
CCOSCP
A single 170-nF capacitor must be connected between the V
pin and V
pin of the
SSP_OSC
CCP_OSC
IXP42X product line and IXC1100 control plane processors. This capacitor value provides both
bypass and filtering.
Datasheet
March 2005
Document Number: 252479, Revision: 005
83
INTEL [ INTEL ]
