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EPM7512AEQC208-7N 参数 Datasheet PDF下载

EPM7512AEQC208-7N图片预览
型号: EPM7512AEQC208-7N
PDF下载: 下载PDF文件 查看货源
内容描述: [EE PLD, 7.5ns, 512-Cell, CMOS, PQFP208,]
分类和应用: 可编程逻辑
文件页数/大小: 64 页 / 961 K
品牌: INTEL [ INTEL ]
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MAX 7000A Programmable Logic Device Data Sheet  
MAX 7000A devices offer a power-saving mode that supports low-power  
Programmable  
Speed/Power  
Control  
operation across user-defined signal paths or the entire device. This  
feature allows total power dissipation to be reduced by 50% or more  
because most logic applications require only a small fraction of all gates to  
operate at maximum frequency.  
The designer can program each individual macrocell in a MAX 7000A  
device for either high-speed (i.e., with the Turbo BitTM option turned on)  
or low-power operation (i.e., with the Turbo Bit option turned off). As a  
result, speed-critical paths in the design can run at high speed, while the  
remaining paths can operate at reduced power. Macrocells that run at low  
power incur a nominal timing delay adder (tLPA) for the tLAD, tLAC, tIC  
,
tEN, tSEXP, tACL, and tCPPW parameters.  
MAX 7000A device outputs can be programmed to meet a variety of  
system-level requirements.  
Output  
Configuration  
MultiVolt I/O Interface  
The MAX 7000A device architecture supports the MultiVolt I/O interface  
feature, which allows MAX 7000A devices to connect to systems with  
differing supply voltages. MAX 7000A devices in all packages can be set  
for 2.5-V, 3.3-V, or 5.0-V I/O pin operation. These devices have one set of  
VCCpins for internal operation and input buffers (VCCINT), and another  
set for I/O output drivers (VCCIO).  
The VCCIOpins can be connected to either a 3.3-V or 2.5-V power supply,  
depending on the output requirements. When the VCCIOpins are  
connected to a 2.5-V power supply, the output levels are compatible with  
2.5-V systems. When the VCCIOpins are connected to a 3.3-V power  
supply, the output high is at 3.3 V and is therefore compatible with 3.3-V  
or 5.0-V systems. Devices operating with VCCIO levels lower than 3.0 V  
incur a slightly greater timing delay of tOD2 instead of tOD1. Inputs can  
always be driven by 2.5-V, 3.3-V, or 5.0-V signals.  
Table 12 describes the MAX 7000A MultiVolt I/O support.  
Table 12. MAX 7000A MultiVolt I/O Support  
VCCIO Voltage  
Input Signal (V)  
3.3  
Output Signal (V)  
2.5  
5.0  
2.5  
3.3  
5.0  
2.5  
3.3  
v
v
v
v
v
v
v
v
v
24  
Altera Corporation  
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