Chapter 5: DC and Switching Characteristics
5–25
Timing Model and Specifications
Table 5–33. MAX II Maximum Output Clock Rate for I/O
MAX II / MAX IIG
MAX IIZ
–3 Speed
Grade
–4 Speed
Grade
–5 Speed
Grade
–6 Speed
Grade
–7 Speed
Grade
–8Speed
I/O Standard
3.3-V LVTTL
Grade
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
304
304
220
220
200
200
150
304
304
304
220
220
200
200
150
304
304
304
220
220
200
200
150
304
304
304
220
220
200
200
150
304
304
304
220
220
200
200
150
304
304
304
220
220
200
200
150
304
3.3-V LVCMOS
2.5-V LVTTL
2.5-V LVCMOS
1.8-V LVTTL
1.8-V LVCMOS
1.5-V LVCMOS
3.3-V PCI
JTAG Timing Specifications
Figure 5–6 shows the timing waveforms for the JTAG signals.
Figure 5–6. MAX II JTAG Timing Waveforms
TMS
TDI
t
JCP
t
t
JPH
JPSU
t
t
JCL
JCH
TCK
TDO
t
t
t
JPXZ
JPZX
JPCO
t
t
JSSU
JSH
Signal
to be
Captured
t
t
t
JSXZ
JSZX
JSCO
Signal
to be
Driven
Table 5–34 shows the JTAG Timing parameters and values for MAX II devices.
Table 5–34. MAX II JTAG Timing Parameters (Part 1 of 2)
Symbol
JCP (1)
Parameter
TCKclock period for VCCIO1 = 3.3 V
TCKclock period for VCCIO1 = 2.5 V
TCKclock period for VCCIO1 = 1.8 V
TCKclock period for VCCIO1 = 1.5 V
TCKclock high time
Min
55.5
62.5
100
143
20
Max
—
Unit
ns
t
—
ns
—
ns
—
ns
tJCH
tJCL
—
ns
TCK clock low time
20
—
ns
© August 2009 Altera Corporation
MAX II Device Handbook
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