MAX II Architecture
Each LAB consists of 10 LEs, LE carry chains, LAB control signals, a local
interconnect, a look-up table (LUT) chain, and register chain connection
lines. There are 26 possible unique inputs into an LAB, with an additional
10 local feedback input lines fed by LE outputs in the same LAB. The local
interconnect transfers signals between LEs in the same LAB. LUT chain
connections transfer the output of one LE’s LUT to the adjacent LE for fast
sequential LUT connections within the same LAB. Register chain
connections transfer the output of one LE’s register to the adjacent LE’s
register within an LAB. The Quartus® II software places associated logic
within an LAB or adjacent LABs, allowing the use of local, LUT chain,
and register chain connections for performance and area efficiency.
Figure 2–3 shows the MAX II LAB.
Logic Array
Blocks
Figure 2–3. MAX II LAB Structure
Row Interconnect
Column Interconnect
LE0
LE1
LE2
LE3
Fast I/O connection
to IOE (1)
Fast I/O Connection
to IOE (1)
DirectLink
DirectLink
interconnect from
adjacent LAB
or IOE
interconnect from
adjacent LAB
or IOE
LE4
LE5
LE6
LE7
DirectLink
DirectLink
interconnect to
adjacent LAB
or IOE
interconnect to
adjacent LAB
or IOE
LE8
LE9
Logic Element
LAB
Local Interconnect
Note to Figure 2–3:
(1) Only from LABs adjacent to IOEs.
Altera Corporation
August 2006
Core Version a.b.c variable
2–5
MAX II Device Handbook, Volume 1
INTEL [ INTEL ]
