Page 10
Power and Operation
that the FPGA has not configured successfully. EPC1 and EPC2 devices wait for
16 DCLKcycles after the last configuration bit was sent for the CONF DONEpin to reach a
_
high state. In this case, the configuration device pulls its OEpin low, which in turn
drives the target device’s nSTATUSpin low. Configuration automatically restarts if the
Auto-restart configuration on error option is turned on in the Quartus II software
from the General tab of the Device & Pin Options dialog box or the MAX+PLUS II
software’s Global Project Device Options dialog box (Assign menu).
In addition, if the FPGA detects a cyclic redundancy check (CRC) error in the received
data, it will flag the error by driving the nSTATUSsignal low. This low signal on
nSTATUSdrives the OEpin of the configuration device low, which resets the
configuration device. CRC checking is performed when configuring all Altera FPGAs.
3.3-V or 5.0-V Operation
Power the EPC1, EPC2, and EPC 1441 configuration device at 3.3 V or 5.0 V. For each
configuration device, an option must be set for the 3.3-V or 5.0-V operation.
For EPC1 and EPC1441 configuration devices, 3.3-V or 5.0-V operation is controlled
by a programming bit in the .pof. The Low-Voltage mode option in the Options tab of
the Configuration Device Options dialog box in the Quartus II software or the Use
Low-Voltage Configuration EPROM option in the Global Project Device Options
dialog box (Assign menu) in the MAX+PLUS II software sets this parameter. For
example, EPC1 devices are programmed automatically to operate in 3.3-V mode when
configuring FLEX 10KA devices, which have a VCC voltage of 3.3 V. In this example,
the EPC1 device’s VCCpin is connected to a 3.3-V power supply.
For EPC2 devices, this option is set externally by the VCCSELpin. In addition, the EPC2
device has an externally controlled option, set by the VPPSELpin, to adjust the
programming voltage to 5.0 V or 3.3 V. The functions of the VCCSELand VPPSELpins
are described below. These pins are only available in the EPC2 devices.
■
VCCSELpin—For EPC2 configuration devices, 5.0-V or 3.3-V operation is controlled
by the VCCSELoption pin. The device functions in 5.0-V mode when VCCSELis
connected to GND and 3.3-V mode when VCCSELis connected to VCC
.
■
VPPSELpin—The VPP programming power pin of the EPC2 device is normally tied
to VCC. For EPC2 devices operating at 3.3 V, it is possible to improve ISP time by
setting VPP to 5.0 V. For all other configuration devices, VPP must be tied to VCC
.
The VPPSELpin of the EPC2 device must be set in accordance with the VPPpin of
the EPC2 device. If the VPPpin is supplied by a 5.0-V power supply, VPPSELmust
be connected to GND and if the VPPpin is supplied by a 3.3-V power supply,
VPPSELmust be connected to VCC
.
Configuration Devices for SRAM-Based LUT Devices
January 2012 Altera Corporation
INTEL [ INTEL ]
