Stratix II Architecture
completely backward-compatible with four-input LUT architectures. One
ALM can also implement any function of up to six inputs and certain
seven-input functions.
In addition to the adaptive LUT-based resources, each ALM contains two
programmable registers, two dedicated full adders, a carry chain, a
shared arithmetic chain, and a register chain. Through these dedicated
resources, the ALM can efficiently implement various arithmetic
functions and shift registers. Each ALM drives all types of interconnects:
local, row, column, carry chain, shared arithmetic chain, register chain,
and direct link interconnects. Figure 2–5 shows a high-level block
diagram of the Stratix II ALM while Figure 2–6 shows a detailed view of
all the connections in the ALM.
Figure 2–5. High-Level Block Diagram of the Stratix II ALM
carry_in
shared_arith_in
reg_chain_in
To general or
local routing
dataf0
datae0
dataa
datab
datac
To general or
local routing
adder0
D
Q
reg0
Combinational
Logic
datad
datae1
dataf1
To general or
local routing
adder1
D
Q
reg1
To general or
local routing
carry_out
shared_arith_out
reg_chain_out
Altera Corporation
May 2007
2–7
Stratix II Device Handbook, Volume 1
INTEL [ INTEL ]
