8XC152JA/JB/JC/JD
e
a
e
100 pF; Load Capacitance for All Other Outputs
e
SS
g
A.C. CHARACTERISTICS (T
e
0 C to 70 C; V
5V 10%; V
0V; Load Capacitance for
e
80 pF)
§
§
A
CC
Port 0, ALE, and PSEN
EXTERNAL PROGRAM AND DATA MEMORY CHARACTERISTICS (Note 7, 10)
16.5 MHz
Variable Oscillator
Symbol
Parameter
Unit
Min
Max
Min
Max
1/TCLCL
Oscillator Frequency
80C152JA/JC
83C152JA/JC
3.5
12
MHz
80C152JB/JD
80C152JA/JC-1
83C152JA/JC-1
80C152JB/JD-1
3.5
16.5
MHz
TLHLL
TAVLL
TLLAX
TLLIV
ALE Pulse Width
81
5
2TCLCL-40
TCLCL-55
TCLCL-35
ns
ns
ns
ns
Address Valid to ALE Low
Address Hold After ALE Low
25
ALE Low to Valid
Instruction In
142
77
4TCLCL-100
3TCLCL-105
TLLPL
TPLPH
TPLIV
ALE Low to PSEN Low
PSEN Pulse Width
20
TCLCL-40
ns
ns
ns
137
3TCLCL-45
PSEN Low to Valid
Instruction In
TPXIX
TPXIZ
TAVIV
TPLAZ
Input Instruction
Hold After PSEN
0
0
ns
ns
ns
ns
Input Instruction
Float After PSEN
35
198
10
TCLCL-25
5TCLCL-105
10
Address to Valid
Instruction In
PSEN Low to Address
Float
TRLRH
TWLWH
TRLDV
RD Pulse Width
WR Pulse Width
263
263
6TCLCL-100
6TCLCL-100
ns
ns
ns
RD Low to Valid
Data In
138
5TCLCL-165
TRHDX
TRHDZ
TLLDV
Data Hold After RD
Data Float After RD
0
0
ns
ns
ns
51
2TCLCL-70
ALE Low to Valid
Data In
335
8TCLCL-150
TAVDV
TLLWL
TAVWL
Address to Valid
Data In
380
232
9TCLCL-165
ns
ns
ns
ns
a
3TCLCL 50
ALE Low to RD or
WR Low
132
112
196
10
3TCLCL-50
4TCLCL-130
6TCLCL-167
TCLCL-50
Address to RD or
WR Low
(8)
TQVWX
Data Valid to WR
Transition
TWHQX
TRLAZ
Data Hold After WR
ns
ns
RD Low to Address
Float
0
0
a
TCLCL 40
TWHLH
RD or WR High to
ALE High
20
100
TCLCL-40
ns
10
INTEL [ INTEL ]
