80502733B256 参数 Datasheet PDF下载

Pentium

®

III Processor for the PGA370 Socket at 500 MHz to 866 MHz

Contents

1.0

Introduction......................................................................................................................... 7

1.1

Terminology........................................................................................................... 8

1.1.1 Package and Processor Terminology ...................................................... 8

1.1.2 Processor Naming Convention.................................................................9

Related Documents.............................................................................................10

Processor System Bus and V

REF .......................................................................................... 11

Clock Control and Low Power States..................................................................12

2.2.1 Normal State—State 1 ...........................................................................13

2.2.2 AutoHALT Powerdown State—State 2...................................................13

2.2.3 Stop-Grant State—State 3 .....................................................................13

2.2.4 HALT/Grant Snoop State—State 4 ........................................................14

2.2.5 Sleep State—State 5..............................................................................14

2.2.6 Deep Sleep State—State 6 ....................................................................14

2.2.7 Clock Control..........................................................................................15

Power and Ground Pins ......................................................................................15

2.3.1 Phase Lock Loop (PLL) Power...............................................................16

Decoupling Guidelines .......................................................................................16

2.4.1 Processor VCC

CORE

Decoupling............................................................16

2.4.2 Processor System Bus AGTL+ Decoupling............................................16

Processor System Bus Clock and Processor Clocking .......................................17

2.5.1 Mixing Processors of Differrent Frequencies .........................................17

Voltage Identification ...........................................................................................17

Processor System Bus Unused Pins...................................................................19

Processor System Bus Signal Groups ................................................................19

2.8.1 Asynchronous vs. Synchronous for System Bus Signals .......................20

2.8.2 System Bus Frequency Select Signals (BSEL[1:0]) ...............................21

Test Access Port (TAP) Connection....................................................................22

Maximum Ratings................................................................................................22

Processor DC Specifications...............................................................................23

AGTL+ System Bus Specifications .....................................................................26

System Bus AC Specifications ............................................................................26

2.13.1 I/O Buffer Model Password ....................................................................27

BCLK and PICCLK Signal Quality Specifications and Measurement

Guidelines ...........................................................................................................34

AGTL+ Signal Quality Specifications and Measurement Guidelines ..................35

AGTL+ Signal Quality Specifications and Measurement Guidelines ..................36

3.3.1 Overshoot/Undershoot Guidelines .........................................................36

3.3.2 Overshoot/Undershoot Magnitude .........................................................36

3.3.3 Overshoot/Undershoot Pulse Duration...................................................37

3.3.4 Activity Factor .........................................................................................37

3.3.5 Reading Overshoot/Undershoot Specification Tables............................38

3.3.6 Determining if a System meets the Overshoot/Undershoot

Specifications .........................................................................................39

1.2

2.0

2.1

2.2

Electrical Specifications....................................................................................................11

2.3

2.4

2.5

2.6

2.7

2.8

2.9

2.10

2.11

2.12

2.13

3.0

Signal Quality Specifications ............................................................................................34

3.1

3.2

3.3

Datasheet

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