Signal Description
Table 2-11. Normal Functional Pin Straps (Sheet 2 of 2)
Strap Pin
Function
PAM66EN
Only relevant when Hot Plug Mode is disabled (HPA_SLOT[3] = 0) OR when in one-slot-
no-glue hot plug mode (HPA_SLOT[3:0] = 1111) AND when in conventional PCI mode
(PAPCIXCAP = 0).
PCI 66 MHz Enable/Disable: Determines the maximum frequency (33 MHz or 66 MHz)
of the PCI bus segment when in conventional PCI mode:
1 = 66 MHz capable when in conventional PCI mode
0 = 33 MHz max frequency when in conventional PCI mode
Sampled on the rising edge of PWROK.
PASTRAP0
Intel Test Mode:
1 = Reserved
0 = Normal operation
HAATNLED_1#/
CMODE
This pin strap is used to configure PCI Express 1.0a support and is muxed with
HAATNLED_1#. The CMODE/HAATNLED_1# pin does not have ODT (On-Die
Termination). Please refer to the latest revision of the appropriate Platform Design Guide
for board implementation details.
SMBUS[5]
SMBus Addressing Straps: Sets the SMBus address.
SMBus Addressing:
SMBUS[3:1]
Bit 7----------------------------‘1’
Bit 6----------------------------‘1’
Bit 5----------------------------SMBUS[5]
Bit 4----------------------------‘0’
Bit 3---------------------------- SMBUS[3]
Bit 2---------------------------- SMBUS[2]
Bit 1---------------------------- SMBUS[1]
Sampled on the rising edge of PWROK.
2.10
Intel® 6702PXH 64-bit PCI Hub Pin Strapping
Table 2-12. Intel® 6702PXH 64-bit PCI Hub Pin Strapping (Sheet 1 of 2)
Strap Pin
Strapping
STRAP_PXHV_1
STRAP_PXHV_2
STRAP_PXHV_3
STRAP_PXHV_4
STRAP_PXHV_5
STRAP_PXHV_6
STRAP_PXHV_7
STRAP_PXHV_8
STRAP_PXHV_9
Pull up to VCC33.
Pull up to VCC33.
Pull up to VCC33.
Pull up to VCC33.
Pull up to VCC33.
Pull up to VCC33.
Pull up to VCC33.
Pull up to VCC33.
Pull up to VCC33.
STRAP_PXHV_10 Pull up to VCC33.
STRAP_PXHV_11 Pull up to VCC33.
Intel® 6702PXH 64-bit PCI Hub Datasheet
27
INTEL [ INTEL ]
