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6400 参数 Datasheet PDF下载

6400图片预览
型号: 6400
PDF下载: 下载PDF文件 查看货源
内容描述: 高级内存缓冲器 [Advanced Memory Buffer]
分类和应用:
文件页数/大小: 250 页 / 3863 K
品牌: INTEL [ INTEL ]
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Registers  
14.1.4  
Register Attribute Definition  
Table 14-2. Register Attributes Definitions  
Attribute  
Read Only  
Abbreviation  
RO  
Description  
This bit is set by the hardware. Software can only read the bit. Writes to  
the register have no effect.  
Write Only  
Read/Write  
WO  
The bit is not implemented as a bit. The write causes some hardware  
event to take place. Read returns all zeroes.  
RW  
The bit can be read or written by software.  
Read/Write /  
Clear  
RWC  
The bit can be either read or cleared by software. In order to clear a bit,  
the software must write a one to it. Writing a zero to an RWC bit will have  
no effect. Hardware will set this bit.  
Read/Write /  
Set  
RWS  
The bit can be either read or set by software. In order to set this RWS bit,  
the software must write a one to it. Writing a zero to an RWS bit will have  
no effect. Hardware will clear this bit.  
Read/Write  
Lock  
RWL  
The bit can be read and written by software. Hardware or a configuration  
bit can lock this bit and prevent it from being updated.  
Read/Write  
Once  
RWO  
The bit can be read by software. It can also be written by software but the  
hardware prevents writing/setting it more than once without a prior  
“effective” reset. This protection applies on a byte-by-byte basis. For  
example, if a two-bit RWO field straddles a byte boundary and only one  
byte is written, then the written bit cannot be rewritten (unless reset).  
However, the unwritten bit can still be written once. This is a special form  
of RWL  
Read/Restricted RRW  
Write  
The bit field can be read by software. Only a restricted set of values can  
be written through a configuration write in-band from the host. Illegal  
values will be aborted and dropped.  
Sticky  
All of the above  
The bit is “sticky” or unchanged by a link reset. These bits can only be  
defaulted by a power-up reset.  
with “ST”  
appended to the  
end  
Reserved  
RV  
This bit is reserved for future expansion and must not be written. The PCI  
Local Bus Specification, Revision 2.2 requires that reserved bits must be  
preserved. Any software that modifies a register that contains a reserved  
bit is responsible for reading the register, modifying the desired bits, and  
writing back the result.  
160  
Intel® 6400/6402 Advanced Memory Buffer Datasheet  
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