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6400 参数 Datasheet PDF下载

6400图片预览
型号: 6400
PDF下载: 下载PDF文件 查看货源
内容描述: 高级内存缓冲器 [Advanced Memory Buffer]
分类和应用:
文件页数/大小: 250 页 / 3863 K
品牌: INTEL [ INTEL ]
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Registers  
14 Registers  
14.1  
Access Mechanisms  
The Intel 6400/6402 Advanced Memory Buffer (AMB) component supports PCI  
configuration space access as defined in the PCI Local Bus Specification, Rev.2.2. The  
internal registers of the AMB can be accessed in byte (8-bit), word (16-bit), or double  
word (32-bit) quantities. All multi-byte numeric fields use “little-endian” ordering (that  
is, lower addresses contain the least significant parts of the field). As a memory buffer  
(not a PCI device or bridge) the AMB is not fully compliant with this mechanism with  
respect to the standard registers (those with offsets 0-3Fh).  
The AMB will not be mapped into the host system's PCI Plug and Play hierarchy, but is  
accessed through a method that is host controller implementation specific.  
Problems will occur if the host system maps the registers into the PCI PnP hierarchy.  
Configuration accesses are transported on the FBD link as configuration read and write  
commands, which mimic the corresponding PCI commands. The AMB responds to any  
device encoded in an FBD command. The AMB responds only to SM Bus requests that  
match the NodeID. The “Device:” mentioned in the heading of each configuration  
register table does not designate the PCI device; it designates the SM Bus node.  
14.1.1  
14.1.2  
Conflict Resolution and Usage Model Limitations  
AMB accepts configuration register reads and writes through the FBD link and through  
SMBus transactions. In Logic Analyzer Interface (LAI) mode, registers are not  
accessible through the in-band FBD link configuration read/write commands.  
Registers do not incur read side-effects.  
FBD Data on Configuration Read Returns  
FBD read return data from the AMB is described in the FB-DIMM Architecture and  
Protocol Specification. Configuration reads are sent in northbound data frames. Only  
the bottom four bytes of this data are defined for a configuration access. The rest of the  
bytes in the read return are undefined. Legal CRCs are generated for these undefined  
inbound bytes.  
14.1.3  
Non-Existent Register Bits  
To comply with the PCI specification, accesses to non-existent registers and bits will be  
treated as follows:  
Table 14-1. Access to “Non-existent” Register Bits  
Access to  
Writes  
Have no effect  
Have no effect  
Reads  
AMB returns -1  
Registers in unimplemented functions  
Registers not listed  
AMB returns all zeroes  
Software must read-modify-  
write to preserve the value  
AMB returns implementation  
specific values  
Reserved bits in registers  
Intel® 6400/6402 Advanced Memory Buffer Datasheet  
159  
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