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631XESB 参数 Datasheet PDF下载

631XESB图片预览
型号: 631XESB
PDF下载: 下载PDF文件 查看货源
内容描述: [Multifunction Peripheral, CMOS, PBGA641, 40 X 40 MM, MICRO, BGA-641]
分类和应用:
文件页数/大小: 106 页 / 3572 K
品牌: INTEL [ INTEL ]
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Electrical Specifications  
Table 4.  
Voltage and Current Specification  
Symbol  
Parameter  
Min  
Typ  
Max  
Unit Notes1, 2  
VTT_OUT_LEFT  
and  
VTT_OUT_RIGHT  
ICC  
DC Current that may be drawn from  
VTT_OUT_LEFT and VTT_OUT_RIGHT per  
pin  
580  
mA  
15, 16  
ITT  
Steady-state FSB termination current  
Power-up FSB termination current  
ICC for PLL lands  
3.5  
4.5  
35  
A
15, 17  
ITT_POWER-UP  
ICC_VCCA  
ICC_VCCIOPLL  
ICC_GTLREF  
NOTES:  
A
mA  
mA  
µA  
ICC for I/O PLL land  
26  
ICC for GTLREF  
200  
1. Unless otherwise noted, all specifications in this table are based on estimates and simulations or empirical data. These  
specifications will be updated with characterized data from silicon measurements at a later date.  
2. Adherence to the voltage specifications for the processor are required to ensure reliable processor operation.  
3. Each processor is programmed with a maximum valid voltage identification value (VID) that is set at manufacturing and can  
not be altered. Individual maximum VID values are calibrated during manufacturing such that two processors at the same  
frequency may have different settings within the VID range. Note that this differs from the VID employed by the processor  
during a power management event (Thermal Monitor 2, Enhanced Intel SpeedStep technology, or Enhanced HALT State).  
4. These voltages are targets only. A variable voltage source should exist on systems in the event that a different  
voltage is required. See Section 2.3 and Table 2 for more information.  
5. The voltage specification requirements are measured across VCC_SENSE and VSS_SENSE lands at the socket with a 100 MHz  
bandwidth oscilloscope, 1.5 pF maximum probe capacitance, and 1 Mminimum impedance. The maximum length of ground  
wire on the probe should be less than 5 mm. Ensure external noise from the system is not coupled into the oscilloscope probe.  
6. Refer to Table 5 and Figure 1 for the minimum, typical, and maximum VCC allowed for a given current. The  
processor should not be subjected to any VCC and ICC combination wherein VCC exceeds VCC_MAX for a given  
current.  
7. I  
is specified at V  
.
CC_MAX  
CC_MAX  
8. The current specified is also for AutoHALT State.  
9. I Stop-Grant is specified at V  
.
CC_MAX  
CC  
10.I  
and I  
are specified at V  
and TC = 50 °C.  
SGNT  
ENHANCED_AUTO_HALT  
CC_TYP  
11.These parameters are based on design characterization and are not tested.  
12.The maximum instantaneous current the processor will draw while the thermal control circuit is active (as indicated by the  
assertion of PROCHOT#) is the same as the maximum I for the processor.  
CC  
13.V must be provided via a separate voltage source and not be connected to V . This specification is measured at the land.  
TT  
CC  
14.Baseboard bandwidth is limited to 20 MHz.  
15.This is maximum total current drawn from VTT plane by only the processor. This specification does not include  
the current coming from RTT (through the signal line). Refer to the Voltage Regulator-Down (VRD) 10.1 Design Guide  
For Desktop and Transportable LGA775 Socket to determine the total ITT drawn by the system.  
16.This is a steady-state I current specification, which is applicable when both V and V are high.  
TT  
TT  
CC  
17.This is a power-up peak current specification that is applicable when V is high and V is low.  
TT  
CC  
Datasheet  
19  
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