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5M80ZE64I5N 参数 Datasheet PDF下载

5M80ZE64I5N图片预览
型号: 5M80ZE64I5N
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash PLD, 14ns, 64-Cell, CMOS, PQFP64, 9 X 9 MM, 0.40 MM PITCH, LEAD FREE, PLASTIC, EQFP-64]
分类和应用:
文件页数/大小: 166 页 / 4004 K
品牌: INTEL [ INTEL ]
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7–14  
Chapter 7: User Flash Memory in MAX V Devices  
Software Support for UFM Block  
Data transfer can be initiated only when the bus is free.  
The data on the SDA line must be stable during the high period of the clock. The  
high or low state of the data line can only change when the clock signal on the SCL  
line is low.  
Any transition on the SDA line while the SCL is high indicates a start or stop  
condition.  
Table 7–5 lists the ALTUFM_I2C megafunction input and output interface signals.  
Table 7–5. ALTUFM_I2C Interface Signals  
Pin  
Description  
Function  
The bidirectional SDA port is used to transmit and receive serial data from the  
UFM. The output stage of the SDA port is configured as an open drain pin to  
perform the wired-ANDfunction.  
SDA  
SCL  
WP  
Serial Data/Address Line  
The bidirectional SCL port is used to synchronize the serial data transfer to and  
from the UFM. The output stage of the SCL port is configured as an open drain  
pin to perform a wired-ANDfunction.  
Serial Clock Line  
Optional active high signal that disables the erase and write function for  
read/write mode. The ALTUFM_I2C megafunction gives you an option to  
protect the entire UFM memory or only the upper half of memory.  
Write Protect  
These inputs set the UFM slave address. The A6, A5, A4, A3 slave address bits  
are programmable, set internally to 1010by default.  
A
,
A
, A  
0
Slave Address Input  
2
1
START and STOP Condition  
The master always generates start (S) and stop (P) conditions. After the start  
condition, the bus is considered busy. Only a stop (P) condition frees the bus. The bus  
stays busy if the repeated start (Sr) condition is executed instead of a stop condition.  
In this occurrence, the start (S) and repeated start (Sr) conditions are functionally  
identical.  
A high-to-low transition on the SDA line while the SCL is high indicates a start  
condition. A low-to-high transition on the SDA line while the SCL is high indicates a  
stop condition. Figure 7–9 shows the start and stop conditions.  
Figure 7–9. Start and Stop Conditions  
SDA  
SDA  
SCL  
SCL  
P
S
Stop Condition  
Start Condition  
MAX V Device Handbook  
January 2011 Altera Corporation  
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