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Switching Characteristics
Switching Characteristics
This section provides performance characteristics of Cyclone V core and periphery
blocks for commercial grade devices.
Transceiver Performance Specifications
This section describes transceiver performance specifications.
Table 20 lists the Cyclone V GX, GT, SX, and ST transceiver specifications.
Table 20. Transceiver Specifications for Cyclone V GX, GT, SX, and ST Devices (Part 1 of 4)
Transceiver
Transceiver
Transceiver
Speed Grade 5 (1)
Speed Grade 6
Speed Grade 7
Symbol/
Description
Conditions
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Reference Clock
Supported I/O
Standards
1.2 V PCML, 1.5 V PCML, 2.5 V PCML, Differential LVPECL (2), HCSL, and LVDS
Input frequency from
—
27
—
—
—
550
400
27
—
—
—
550
400
27
—
—
—
550
400
MHz
ps
REFCLK input pins (3)
20% to 80% of
rising clock edge
Rise time
80% to 20% of
falling clock
edge
Fall time
—
—
400
—
—
400
—
—
400
ps
Duty cycle
—
45
—
—
55
45
—
—
55
45
—
—
55
%
Peak-to-peak
differential input voltage
—
200
2000
200
2000
200
2000
mV
Spread-spectrum
modulating clock
frequency
PCIe
PCIe
30
—
33
30
—
33
30
—
33
kHz
—
0 to
0 to
0 to
Spread-spectrum
downspread
—
—
—
—
—
—
—
—
—
—
—
—
–0.5%
–0.5%
–0.5%
On-chip termination
resistors
—
—
100
100
100
Ω
V
ICM (AC coupled)
VCCE_GXBL supply (5), (6)
VCCE_GXBL supply
VCCE_GXBL supply
V
HCSL I/O
standard for the
PCIe reference
clock
VICM (DC coupled)
250
—
550
250
—
550
250
—
550
mV
10 Hz
100 Hz
1 KHz
—
—
—
—
—
—
—
—
—
—
—
—
–50
–80
—
—
—
—
—
—
—
—
—
—
—
—
–50
–80
—
—
—
—
—
—
—
—
—
—
—
—
–50
–80
dBc/Hz
dBc/Hz
–110
–120
–120
–130
–110
–120
–120
–130
–110 dBc/Hz
–120 dBc/Hz
–120 dBc/Hz
–130 dBc/Hz
Transmitter REFCLK
Phase Noise (4)
10 KHz
100 KHz
≥1 MHz
Cyclone V Device Datasheet
July 2014 Altera Corporation