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5AGXMA1D6F27C6N 参数 Datasheet PDF下载

5AGXMA1D6F27C6N图片预览
型号: 5AGXMA1D6F27C6N
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 500MHz, 75000-Cell, CMOS, PBGA672, ROHS COMPLIANT, FBGA-672]
分类和应用: 可编程逻辑
文件页数/大小: 182 页 / 2239 K
品牌: INTEL [ INTEL ]
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AV-51002  
2015.12.16  
1-68  
I2C Timing Characteristics  
Symbol  
Description  
Min  
10  
0
Typ  
Unit  
ns  
Ts  
Setup time for MDIO data  
Hold time for MDIO data  
Th  
ns  
Figure 1-15: MDIO Timing Diagram  
MDC  
Td  
MDIO_OUT  
Th  
Tsu  
MDIO_IN  
I2C Timing Characteristics  
Table 1-59: I2C Timing Requirements for Arria V Devices  
Standard Mode  
Fast Mode  
Symbol  
Description  
Unit  
Min  
Max  
10  
Min  
Max  
2.5  
Tclk  
Serial clock (SCL) clock period  
SCL high time  
4.7  
4
µs  
µs  
µs  
µs  
µs  
µs  
µs  
µs  
µs  
Tclkhigh  
Tclklow  
Ts  
0.6  
1.3  
0.1  
0
SCL low time  
Setup time for serial data line (SDA) data to SCL  
Hold time for SCL to SDA data  
0.25  
0
Th  
3.45  
0.2  
0.9  
0.2  
Td  
SCL to SDA output data delay  
4.7  
4
Tsu_start  
Thd_start  
Tsu_stop  
Setup time for a repeated start condition  
Hold time for a repeated start condition  
Setup time for a stop condition  
0.6  
0.6  
0.6  
4
Arria V GX, GT, SX, and ST Device Datasheet  
Send Feedback  
Altera Corporation  
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