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5AGXMA1D6F27C6N 参数 Datasheet PDF下载

5AGXMA1D6F27C6N图片预览
型号: 5AGXMA1D6F27C6N
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 500MHz, 75000-Cell, CMOS, PBGA672, ROHS COMPLIANT, FBGA-672]
分类和应用: 可编程逻辑
文件页数/大小: 182 页 / 2239 K
品牌: INTEL [ INTEL ]
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AV-51002  
2015.12.16  
1-13  
OCT Without Calibration Resistance Tolerance Specifications  
OCT Without Calibration Resistance Tolerance Specifications  
Table 1-9: OCT Without Calibration Resistance Tolerance Specifications for Arria V Devices  
This table lists the Arria V OCT without calibration resistance tolerance to PVT changes.  
ResistanceTolerance  
Unit  
Symbol  
Description  
Condition (V)  
–I3, –C4  
–I5, –C5  
–C6  
25-Ω RS  
Internal series termination without VCCIO = 3.0, 2.5  
calibration (25-Ω setting)  
30  
40  
40  
%
%
%
%
%
%
%
25-Ω RS  
25-Ω RS  
50-Ω RS  
50-Ω RS  
50-Ω RS  
100-Ω RD  
Internal series termination without VCCIO = 1.8, 1.5  
calibration (25-Ω setting)  
30  
35  
30  
30  
35  
25  
40  
50  
40  
40  
50  
40  
40  
50  
40  
40  
50  
40  
Internal series termination without VCCIO = 1.2  
calibration (25-Ω setting)  
Internal series termination without VCCIO = 3.0, 2.5  
calibration (50-Ω setting)  
Internal series termination without VCCIO = 1.8, 1.5  
calibration (50-Ω setting)  
Internal series termination without VCCIO = 1.2  
calibration (50-Ω setting)  
Internal differential termination  
(100-Ω setting)  
VCCIO = 2.5  
Figure 1-1: Equation for OCT Variation Without Recalibration  
Arria V GX, GT, SX, and ST Device Datasheet  
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Altera Corporation