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5AGXMA1D6F27C6N 参数 Datasheet PDF下载

5AGXMA1D6F27C6N图片预览
型号: 5AGXMA1D6F27C6N
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 500MHz, 75000-Cell, CMOS, PBGA672, ROHS COMPLIANT, FBGA-672]
分类和应用: 可编程逻辑
文件页数/大小: 182 页 / 2239 K
品牌: INTEL [ INTEL ]
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AV-51002  
2015.12.16  
2-12  
On-Chip Termination (OCT) Specifications  
Table 2-11: OCT Without Calibration Resistance Tolerance Specifications for Arria V GZ Devices  
Resistance Tolerance  
Symbol  
Description  
Conditions  
Unit  
C3, I3L  
C4, I4  
25-Ω R, 50-Ω RS  
Internal series termination without  
calibration (25-Ω setting)  
VCCIO = 3.0 and 2.5 V  
40  
40  
40  
50  
40  
50  
25  
%
25-Ω RS  
25-Ω RS  
50-Ω RS  
50-Ω RS  
100-Ω RD  
Internal series termination without  
calibration (25-Ω setting)  
VCCIO = 1.8 and 1.5 V  
VCCIO = 1.2 V  
40  
50  
40  
50  
25  
%
%
%
%
%
Internal series termination without  
calibration (25-Ω setting)  
Internal series termination without  
calibration (50-Ω setting)  
VCCIO = 1.8 and 1.5 V  
VCCIO = 1.2 V  
Internal series termination without  
calibration (50-Ω setting)  
Internal differential termination (100-Ω  
setting)  
VCCIO = 2.5 V  
Figure 2-1: OCT Variation Without Re-Calibration for Arria V GZ Devices  
dR  
dT  
dR  
dV  
1 +(  
)
x
(
)
V
ROCT = RSCAL  
T
x
(
(
Notes:  
1. The ROCT value shows the range of OCT resistance with the variation of temperature and VCCIO  
2. RSCAL is the OCT resistance value at power-up.  
.
3. ΔT is the variation of temperature with respect to the temperature at power-up.  
4. ΔV is the variation of voltage with respect to the VCCIO at power-up.  
5. dR/dT is the percentage change of RSCAL with temperature.  
6. dR/dV is the percentage change of RSCAL with voltage.  
Arria V GZ Device Datasheet  
Send Feedback  
Altera Corporation  
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