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5AGXMA1D6F27C6N 参数 Datasheet PDF下载

5AGXMA1D6F27C6N图片预览
型号: 5AGXMA1D6F27C6N
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 500MHz, 75000-Cell, CMOS, PBGA672, ROHS COMPLIANT, FBGA-672]
分类和应用: 可编程逻辑
文件页数/大小: 182 页 / 2239 K
品牌: INTEL [ INTEL ]
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AV-51002  
2015.12.16  
2-4  
Recommended Operating Conditions  
The maximum allowed overshoot duration is specified as a percentage of high time over the lifetime of the device. A DC signal is equivalent to  
100% of the duty cycle.  
For example, a signal that overshoots to 3.95 V can be at 3.95 V for only ~21% over the lifetime of the device; for a device lifetime of 10 years, the  
overshoot duration amounts to ~2 years.  
Table 2-4: Maximum Allowed Overshoot During Transitions for Arria V GZ Devices  
Symbol  
Description  
Condition (V)  
Overshoot Duration as % @ TJ = 100°C  
Unit  
%
3.8  
3.85  
3.9  
100  
64  
36  
21  
12  
7
%
%
3.95  
4
%
Vi (AC)  
AC input voltage  
%
4.05  
4.1  
%
4
%
4.15  
4.2  
2
%
1
%
Recommended Operating Conditions  
Table 2-5: Recommended Operating Conditions for Arria V GZ Devices  
Power supply ramps must all be strictly monotonic, without plateaus.  
Symbol  
Description  
Condition  
Minimum(113)  
Typical  
Maximum (113)  
Unit  
VCC  
Core voltage and periphery circuitry power supply (114)  
0.82  
0.85  
0.88  
V
(113)  
(114)  
The power supply value describes the budget for the DC (static) power supply tolerance and does not include the dynamic tolerance requirements.  
Refer to the PDN tool for the additional budget for the dynamic tolerance requirements.  
The VCC core supply must be set to 0.9 V if the Partial Reconfiguration (PR) feature is used.  
Arria V GZ Device Datasheet  
Send Feedback  
Altera Corporation  
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