AV-51002
2015.12.16
2-66
Active Serial Configuration Timing
Table 2-58: AS Timing Parameters for AS x1 and AS x4 Configurations in Arria V GZ Devices
The minimum and maximum numbers apply only if you choose the internal oscillator as the clock source for initializing the device.
tCF2CD, tCF2ST0, tCFG, tSTATUS, and tCF2ST1 timing parameters are identical to the timing parameters for PS mode listed in the "PS Timing Parameters for
Arria V GZ Devices" table.
Symbol
tCO
Parameter
DCLKfalling edge to AS_DATA0/ASDO output
Data setup time before falling edge on DCLK
Data hold time after falling edge on DCLK
CONF_DONEhigh to user mode (215)
Minimum
Maximum
Unit
ns
—
1.5
0
4
—
tSU
ns
tH
—
ns
tCD2UM
tCD2CU
175
437
—
μs
CONF_DONEhigh to CLKUSRenabled
4 × maximum DCLK
—
period
tCD2UMC CONF_DONEhigh to user mode with CLKUSRoption on
tCD2CU + (17,408 ×
CLKUSRperiod)
—
—
Table 2-59: DCLK Frequency Specification in the AS Configuration Scheme
This applies to the DCLK frequency specification when using the internal oscillator as the configuration clock source.
The AS multi-device configuration scheme does not support DCLKfrequency of 100 MHz.
Minimum
5.3
Typical
7.9
Maximum
12.5
Unit
MHz
MHz
MHz
MHz
10.6
15.7
31.4
62.9
25.0
21.3
50.0
42.6
100.0
(215)
To enable the CLKUSR pin as the initialization clock source and to obtain the maximum frequency specification on this pin, refer to the
“Initialization” section of the Configuration, Design Security, and Remote System Upgrades in Arria V Devices chapter.
Arria V GZ Device Datasheet
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