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5AGXFB3K6F40C6N 参数 Datasheet PDF下载

5AGXFB3K6F40C6N图片预览
型号: 5AGXFB3K6F40C6N
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 500MHz, PBGA1517, ROHS COMPLIANT, FBGA-1517]
分类和应用: 可编程逻辑
文件页数/大小: 122 页 / 2566 K
品牌: INTEL [ INTEL ]
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Electrical Characteristics  
Page 11  
Table 10 lists OCT variation with temperature and voltage after power-up calibration.  
The OCT variation is valid for a VCCIO range of 5% and a temperature range of 0° to  
85°C.  
Table 10. OCT Variation after Power-Up Calibration for Arria V Devices  
Symbol  
Description  
V
CCIO (V)  
3.0  
Value  
0.100  
0.100  
0.100  
0.100  
0.150  
0.150  
0.150  
0.189  
0.208  
0.266  
0.273  
0.200  
0.200  
0.317  
Unit  
2.5  
1.8  
OCT variation with voltage without  
recalibration  
dR/dV  
1.5  
%/mV  
1.35  
1.25  
1.2  
3.0  
2.5  
1.8  
OCT variation with temperature  
without recalibration  
dR/dT  
1.5  
%/°C  
1.35  
1.25  
1.2  
Pin Capacitance  
Table 11 lists the Arria V pin capacitance.  
Table 11. Pin Capacitance for Arria V Devices  
Symbol  
CIOTB  
Description  
Value  
Unit  
pF  
Input capacitance on top/bottom I/O pins  
Input capacitance on left/right I/O pins  
6
6
CIOLR  
pF  
COUTFB  
CIOVREF  
Input capacitance on dual-purpose clock output/feedback pins  
Input capacitance on REF pins  
6
pF  
V
48  
pF  
Hot Socketing  
Table 12 lists the hot socketing specifications for Arria V devices.  
Table 12. Hot Socketing Specifications for Arria V Devices  
Symbol  
IIOPIN (DC)  
Description  
DC current per I/O pin  
Maximum  
300 μA  
(1)  
IIOPIN (AC)  
AC current per I/O pin  
8 mA  
DC current per transceiver transmitter (TX)  
pin  
IXCVR-TX (DC)  
100 mA  
50 mA  
IXCVR-RX (DC)  
DC current per transceiver receiver (RX) pin  
Note to Table 12:  
(1) The I/O ramp rate is 10 ns or more. For ramp rates faster than 10 ns, |IIOPIN| = C dv/dt, in which C is the I/O pin  
capacitance and dv/dt is the slew rate.  
December 2013 Altera Corporation  
Arria V GX, GT, SX, and ST Device Datasheet