Electrical Specifications
Table 2-10. V Static and Transient Tolerance for 775_VR_CONFIG_04B Processors
CC
Voltage Deviation from VID Setting (V)1, 2, 3, 4
ICC (A)
Maximum Voltage
Typical Voltage
Minimum Voltage
1.30 mΩ
1.35 mΩ
1.40 mΩ
0
5
0.000
-0.007
-0.013
-0.020
-0.026
-0.033
-0.039
-0.046
-0.052
-0.059
-0.065
-0.072
-0.078
-0.085
-0.091
-0.098
-0.104
-0.111
-0.117
-0.124
-0.130
-0.137
-0.143
-0.150
-0.155
-0.019
-0.026
-0.033
-0.039
-0.046
-0.053
-0.060
-0.066
-0.073
-0.080
-0.087
-0.093
-0.100
-0.107
-0.114
-0.120
-0.127
-0.134
-0.141
-0.147
-0.154
-0.161
-0.168
-0.174
-0.180
-0.038
-0.045
-0.052
-0.059
-0.066
-0.073
-0.080
-0.087
-0.094
-0.101
-0.108
-0.115
-0.122
-0.129
-0.136
-0.143
-0.150
-0.157
-0.164
-0.171
-0.178
-0.185
-0.192
-0.199
-0.205
10
15
20
25
30
35
40
45
50
55
60
65
70
75
80
85
90
95
100
105
110
115
119
NOTES:
1.
The loadline specification includes both static and transient limits except for overshoot allowed as shown in
Section 2.12.
2.
3.
This table is intended to aid in reading discrete points on Figure 2-2.
The loadlines specify voltage limits at the die measured at the VCC_SENSE and VSS_SENSE lands. Voltage
regulation feedback for voltage regulator circuits must be taken from processor V and V lands. Refer to
CC
SS
the Voltage Regulator Down (VRD) 10.1 Design Guide For Desktop LGA775 Socket for socket loadline guide-
lines and VR implementation details.
4.
Adherence to this loadline specification for the processor is required to ensure reliable processor operation.
Datasheet
29