欢迎访问ic37.com |
会员登录 免费注册
发布采购

326769-002 参数 Datasheet PDF下载

326769-002图片预览
型号: 326769-002
PDF下载: 下载PDF文件 查看货源
内容描述: 移动第三代英特尔®科雷亚?? ¢处理器家族 [Mobile 3rd Generation Intel® Core™ Processor Family]
分类和应用:
文件页数/大小: 342 页 / 2513 K
品牌: INTEL [ INTEL ]
 浏览型号326769-002的Datasheet PDF文件第67页浏览型号326769-002的Datasheet PDF文件第68页浏览型号326769-002的Datasheet PDF文件第69页浏览型号326769-002的Datasheet PDF文件第70页浏览型号326769-002的Datasheet PDF文件第72页浏览型号326769-002的Datasheet PDF文件第73页浏览型号326769-002的Datasheet PDF文件第74页浏览型号326769-002的Datasheet PDF文件第75页  
Processor Configuration Registers  
2.5.27  
PAM6—Programmable Attribute Map 6 Register  
This register controls the read, write and shadowing attributes of the BIOS range from  
E_8000h to E_FFFFh. The Uncore allows programmable memory attributes on 13  
legacy memory segments of various sizes in the 768 KB to 1 MB address range. Seven  
Programmable Attribute Map (PAM) registers are used to support these features.  
Cacheability of these areas is controlled using the MTRR register in the core.  
Two bits are used to specify memory attributes for each memory segment. These bits  
apply to host accesses to the PAM areas. These attributes are:  
• RE – Read Enable. When RE=1, the host read accesses to the corresponding  
memory segment are claimed by the Uncore and directed to main memory.  
Conversely, when RE=0, the host read accesses are directed to DMI.  
• WE – Write Enable. When WE=1, the host write accesses to the corresponding  
memory segment are claimed by the Uncore and directed to main memory.  
Conversely, when WE=0, the host read accesses are directed to DMI.  
The RE and WE attributes permit a memory segment to be Read Only, Write Only,  
Read/Write or Disabled. For example, if a memory segment has RE=1 and WE=0, the  
segment is Read Only.  
B/D/F/Type:  
Address Offset:  
Reset Value:  
Access:  
0/0/0/PCI  
86h  
00h  
RW  
8 bits  
0h  
Size:  
BIOS Optimal Default  
Reset  
Value  
RST/  
PWR  
Bit  
Access  
Description  
7:6  
RO  
0h  
00b  
0h  
Reserved (RSVD)  
0EC000–0EFFFF Attribute (HIENABLE)  
This field controls the steering of read and write cycles that  
address the BIOS area from 0EC000h to 0EFFFFh.  
00 = DRAM Disabled. All accesses are directed to DMI.  
01 = Read Only. All reads are sent to DRAM, all writes are  
forwarded to DMI.  
10 = Write Only. All writes are sent to DRAM, all reads are  
serviced by DMI.  
11 = Normal DRAM Operation. All reads and writes are serviced  
by DRAM.  
5:4  
3:2  
RW  
RO  
Uncore  
This register is locked by Intel TXT.  
Reserved (RSVD)  
0E8000–0EBFFF Attribute (LOENABLE)  
This field controls the steering of read and write cycles that  
address the BIOS area from 0E8000h to 0EBFFFh.  
00 = DRAM Disabled. All reads are sent to DRAM. All writes are  
forwarded to DMI.  
01 = Read Only. All reads are sent to DRAM. All writes are  
forwarded to DMI.  
1:0  
RW  
00b  
Uncore  
10 = Write Only. All writes are sent to DRAM. All reads are  
serviced by DMI.  
11 = Normal DRAM Operation. All reads and writes are serviced  
by DRAM.  
This register is locked by Intel TXT.  
Datasheet, Volume 2  
71