2.5.10
2.5.11
2.5.12
2.5.13
2.5.14
2.5.15
2.5.16
2.5.17
2.5.18
2.5.19
2.5.20
2.5.21
2.5.22
2.5.23
2.5.24
2.5.25
2.5.26
2.5.27
2.5.28
2.5.29
2.5.30
2.5.31
2.5.32
2.5.33
2.5.34
2.5.35
2.5.36
2.5.37
2.5.38
2.5.39
CAPPTR—Capabilities Pointer Register ....................................................54
PXPEPBAR—PCI Express* Egress Port Base Address Register.....................54
MCHBAR—Host Memory Mapped Register Range Base Register ..................55
GGC—GMCH Graphics Control Register ...................................................55
DEVEN—Device Enable Register.............................................................57
PAVPC—Protected Audio Video Path Control Register ................................59
DPR—DMA Protected Range Register......................................................59
PCIEXBAR—PCI Express* Register Range Base Address Register................60
DMIBAR—Root Complex Register Range Base Address Register..................62
MESEG_BASE—Intel® Management Engine Base Address Register..............63
MESEG_MASK—Intel® Management Engine Limit Address Register.............64
PAM0—Programmable Attribute Map 0 Register .......................................65
PAM1—Programmable Attribute Map 1 Register .......................................66
PAM2—Programmable Attribute Map 2 Register .......................................67
PAM3—Programmable Attribute Map 3 Register .......................................68
PAM4—Programmable Attribute Map 4 Register .......................................69
PAM5—Programmable Attribute Map 5 Register .......................................70
PAM6—Programmable Attribute Map 6 Register .......................................71
LAC—Legacy Access Control Register......................................................72
REMAPBASE—Remap Base Address Register............................................76
REMAPLIMIT—Remap Limit Address Register...........................................77
TOM—Top of Memory Register...............................................................77
TOUUD—Top of Upper Usable DRAM Register ..........................................78
BDSM—Base Data of Stolen Memory Register..........................................79
BGSM—Base of GTT Stolen Memory Register...........................................79
TSEGMB—TSEG Memory Base Register...................................................80
TOLUD—Top of Low Usable DRAM Register..............................................80
SKPD—Scratchpad Data Register ...........................................................81
CAPID0_A—Capabilities A Register.........................................................82
CAPID0_B—Capabilities B Register.........................................................84
2.6
PCI Device 1 Function 0–2 Configuration Space Registers........................................86
2.6.1
2.6.2
2.6.3
2.6.4
2.6.5
2.6.6
2.6.7
2.6.8
VID—Vendor Identification Register........................................................87
DID—Device Identification Register........................................................88
PCICMD—PCI Command Register...........................................................88
PCISTS—PCI Status Register.................................................................90
RID—Revision Identification Register......................................................92
CC—Class Code Register.......................................................................92
CL—Cache Line Size Register.................................................................92
HDR—Header Type Register..................................................................93
PBUSN—Primary Bus Number Register ...................................................93
SBUSN—Secondary Bus Number Register ...............................................93
SUBUSN—Subordinate Bus Number Register ...........................................94
IOBASE—I/O Base Address Register.......................................................95
IOLIMIT—I/O Limit Address Register ......................................................95
SSTS—Secondary Status Register..........................................................96
MBASE—Memory Base Address Register .................................................97
MLIMIT—Memory Limit Address Register.................................................98
PMBASE—Prefetchable Memory Base Address Register..............................99
PMLIMIT—Prefetchable Memory Limit Address Register...........................100
PMBASEU—Prefetchable Memory Base Address Upper Register ................100
PMLIMITU—Prefetchable Memory Limit Address Upper Register................101
CAPPTR—Capabilities Pointer Register ..................................................101
INTRLINE—Interrupt Line Register .......................................................102
INTRPIN—Interrupt Pin Register ..........................................................102
BCTRL—Bridge Control Register...........................................................103
PM_CAPID—Power Management Capabilities Register .............................104
2.6.9
2.6.10
2.6.11
2.6.12
2.6.13
2.6.14
2.6.15
2.6.16
2.6.17
2.6.18
2.6.19
2.6.20
2.6.21
2.6.22
2.6.23
2.6.24
2.6.25
4
Datasheet, Volume 2
INTEL [ INTEL ]
