Processor Configuration Registers
2.21.3
ECAP_REG—Extended Capability Register
This register reports remapping hardware extended capabilities.
B/D/F/Type:
Address Offset:
Reset Value:
Access:
0/0/0/VC0PREMAP
10–17h
0000000000F010DAh
RO-V, RO
64 bits
Size:
BIOS Optimal Default
00000000000h
Reset
Value
RST/
PWR
Bit
Access
Description
63:24
RO
0h
1111b
0h
Reserved (RSVD)
Maximum Handle Mask Value (MHMV)
The value in this field indicates the maximum supported value for
the Handle Mask (HM) field in the interrupt entry cache
invalidation descriptor (iec_inv_dsc).
This field is valid only when the IR field in Extended Capability
register is reported as set.
23:20
19:18
17:8
RO
RO
RO
Uncore
Uncore
Reserved (RSVD)
IOTLB Register Offset (IRO)
This field specifies the offset to the IOTLB registers relative to the
register base address of this remapping hardware unit.
If the register base address is X, and the value reported in this
field is Y, the address for the first IOTLB invalidation register is
calculated as X+(16*Y).
010h
Snoop Control (SC)
0 = Hardware does not support 1-setting of the SNP field in the
page-table entries.
1 = Hardware supports the 1-setting of the SNP field in the
page-table entries.
7
6
RO-V
RO-V
1b
1b
Uncore
Uncore
Uncore
Pass Through (PT)
0 = Hardware does not support pass-through translation type in
context entries.
1 = Hardware supports pass-through translation type in context
entries.
Caching Hints (CH)
0 = Hardware does not support IOTLB caching hints (ALH and
EH fields in context-entries are treated as reserved).
1 = Hardware supports IOLTB caching hints through the ALH and
EH fields in context-entries.
5
4
3
RO
RO
0b
0h
1b
Reserved (RSVD)
Interrupt Remapping Support (IR)
0 = Hardware does not support interrupt remapping.
1 = Hardware supports interrupt remapping.
RO-V
Uncore
Implementations reporting this field as set must also support
Queued Invalidation (QI).
Device IOTLB Support (DI)
0 = Hardware does not support device-IOTLBs.
1 = Hardware supports Device-IOTLBs.
Implementations reporting this field as set must also support
Queued Invalidation (QI).
2
1
RO
0b
1b
Uncore
Uncore
Queued Invalidation Support (QI)
0 = Hardware does not support queued invalidations.
1 = Hardware supports queued invalidations.
RO-V
Datasheet, Volume 2
315
INTEL [ INTEL ]
