82567—Datasheet
Revision History
Date
Oct 2006
January 2007
February 2007
April 2007
May 2007
August 2007
September
2007
November 2007
November 2007
December 2007
Revision
0.1
0.25
0.26
0.50
0.51
0.75
Description
Initial release (Intel secret)
Corrected pin numbers and made minor text corrections (Intel Confidential)
Corrected GLAN TX pin numbers; added RSET & DIS_REG1_0 to the signal descriptions; corrected
LAN_DISABLE# (active high) to LAN_DISABLE_N (active low); in the Visual Pin Assignment
Diagram, pin 37, “LAN Enable” was corrected to “LAN_Disable_N”; removed VHV references.
Minor text updates.
Updated power consumption target values.
Added Low-Power feature information, Recommended Operating Conditions, DC and AC
Characteristics, Preliminary LED/TEST/JTAG I/F DC Specifications, Crystal Specification, Voltage
RegulatorPower Supply Specification, PnP Transistor Specification, and Power Sequencing
information.
Changed IEEE 802.3ab designation to conformance
Updated features list; updated Reference Documents; added SKU information; Updated power rail
information (1.8 V-1.9 V, 1.05 V); clarified oscillator placement information; updated power target
information; corrected Slope and Operation Range characteristics for 1.8-1.9 V rail; added pointer
to reference schematics for regulator information.
Deleted “programmable” from 1.8 V-1.9 V power rail listing in the Features list.
Corrected 1.05 V power rail tolerance to +7% / -5% (1.0 V min, 1.12 V max)
Added XOR test file information; updated SKU and Features table; added information regarding
using LAN_PHY_PWR_CTRL ; updated Recommended Operating Conditions; updated DC and AC
characteristics; updated crystal/oscillator specifications; updated the measured power
consumption values; updated reference schematic link information; updated the 1.8 V-1.9 V rail
operational range value; updated the 1.05 V rail operational range value; corrected P
tot
Min value
in PNP specification;
Updated Reference Documents list; updated Testability Pins table; updated SKU table; updated
Power Consumption tables 7-10; updated power delivery drawing; added Ambient Operating
Temperature table.
Updated SKU table; Combined Tables 5 and 6 to create new Table 5.
Updated Table 2.4 (added pull-up type designation to LAN_DISABLE_N); updated Table 12 (added
LAN_DISABLE_N information)
Updated WoL information; added System Idle Power Saver information; updated crystal
tolerances; updated LED pin table; updated pinout illustration; updated package tolerance values.
Updated SKU table; added SPI
FLASH Programming Guide
and
82567 Specification Update
to
Reference Documents; added note regarding ACBS operation; added WoL power information;
added Solution Power information to Power Consumption table; clarified crystal Drive Level
specification.
0.76
1.5
1.51
1.6
February 2008
1.7
March 2008
March 2008
April 2008
July 2008
2.0
2.1
2.2
2.3
April 2009
2.4
Note:
The revision numbering system changed with the first November 2007 release. At that time, the collateral for this device
began synchronizing with platform collateral revision numbering. There were no releases between versions 0.76 and 1.5.
iv
INTEL [ INTEL CORPORATION ]
