82567—Datasheet
JTAG_TRST
JTAG_TMS
35
39
I
JTAG Reset
I/PU
JTAG TMS Input
Test Mode Enable
TEST_EN
36
T/s
This signal enables test mode capabilities. It should be strapped
to GND for normal operation.
Note:
The 82567 uses the JTAG interface to support XOR files for manufacturing test. BSDL is
not supported.
2.6
Power Supply Pins
Signal Name
Pin
Type
Description
3
28
46
3.3 VDC Supply
This is connected to the 82567.
VCC3_3
P
P
5
8
33
38
1.05 V DC Supply
This is connected to the 82567.
VCC1_05
11
14
18
19
24
25
30
41
32
54
1.8 V-1.9 V DC Supply
This is connected to the 82567. 82567 supports both 1.8 V and
1.9 V for this DC supply.
VCC1_8
P
1.05 V Control
CTRL10
CTRL18
31
29
Out
Out
This is the voltage control signal for the external PNP transistor
that generates the 1.05 V supply.
1.8 V-1.9 V Control
This is the voltage control signal for the external PNP transistor.
The default voltage generated from the external PNP is 1.9 V.
When set to 3.3 V, configured to use external regulator for 1.05
V supply. When set to 0, the internal regulator will be used for
1.05 V supply. A 1 kOhm pull up or 1 kOhm pull down resistor is
required, depending on the desired configuration.
DIS_REG1_0
34
A
10
INTEL [ INTEL ]
