Functional Description
Table 5-47 shows the debug port behavior related to the state of bits in the debug
registers as well as bits in the associated Port Status and Control register.
Table 5-47. Debug Port Behavior
OWNER_CNT ENABLED_CT
Port
Enable
Run /
Stop
Suspend
Debug Port Behavior
Debug port is not being used.
Normal operation.
0
1
X
0
X
X
X
X
X
X
Debug port is not being used.
Normal operation.
Debug port in Mode 1. SYNC
keepalives sent plus debug
traffic
1
1
0
0
X
Debug port in Mode 2. SOF
(and only SOF) is sent as
keepalive. Debug traffic is also
sent. Note that no other
normal traffic is sent out this
port, because the port is not
enabled.
1
1
0
1
X
invalid. Host controller driver
should never put controller
into this state (enabled, not
running and not suspended).
1
1
1
0
0
Port is suspended. No debug
traffic sent.
1
1
1
1
1
1
1
1
0
1
1
1
0
1
Debug port in Mode 2. Debug
traffic is interspersed with
normal traffic.
Port is suspended. No debug
traffic sent.
1
5.19.10.1.1 OUT Transactions
An Out transaction sends data to the debug device. It can occur only when the
following are true:
• The debug port is enabled
• The debug software sets the GO_CNT bit
• The WRITE_READ#_CNT bit is set
The sequence of the transaction is:
1. Software sets the appropriate values in the following bits:
— USB_ADDRESS_CNF
— USB_ENDPOINT_CNF
— DATA_BUFFER[63:0]
— TOKEN_PID_CNT[7:0]
— SEND_PID_CNT[15:8]
— DATA_LEN_CNT
— WRITE_READ#_CNT: (note: this will always be 1 for OUT transactions)
— GO_CNT: (note: this will always be 1 to initiate the transaction)
210
Datasheet
INTEL [ INTEL ]
