Functional Description
5.17.2
Interrupt Mapping
Mapping Option #1 (Legacy Replacement Option)
In this case, the Legacy Replacement Rout bit (LEG_RT_CNF) is set. This forces the
mapping found in Table 5-43.
Table 5-43. Legacy Replacement Routing
Timer
8259 Mapping
APIC Mapping
Comment
In this case, the 8254 timer will
not cause any interrupts
0
IRQ0
IRQ2
In this case, the RTC will not
cause any interrupts.
1
IRQ8
IRQ8
2 & 3
Per IRQ Routing Field.
Per IRQ Routing Field
4, 5, 6, 7
(Corporate
Only)
not available
not available
NOTE: (Corporate Only) The Legacy Option does not preclude delivery of IRQ0/IRQ8 via direct
FSB interrupt messages.
Mapping Option #2 (Standard Option)
In this case, the Legacy Replacement Rout bit (LEG_RT_CNF) is 0. Each timer has its
own routing control. The interrupts can be routed to various interrupts in the 8259 or
I/O APIC. A capabilities field indicates which interrupts are valid options for routing. If a
timer is set for edge-triggered mode, the timers should not be share with any PCI
interrupts.
For the Intel ICH10, the only supported interrupt values are as follows:
Timer 0 and 1: IRQ20, 21, 22 & 23 (I/O APIC only).
Timer 2: IRQ11 (8259 or I/O APIC) and IRQ20, 21, 22, and 23 (I/O APIC only).
Timer 3: IRQ12 (8259 or I/O APIC) and IRQ 20, 21, 22, and 23 (I/O APIC only).
Interrupts from Timer 4, 5, 6, 7 (Corporate Only) can only be delivered via direct FSB
interrupt messages.
5.17.3
Periodic vs. Non-Periodic Modes
Non-Periodic Mode
Timer 0 is configurable to 32 (default) or 64-bit mode, whereas Timers 1, 2 and 3 only
support 32-bit mode (See Section 21.1.5).
All of the timers support non-periodic mode.
Consult Section 2.3.9.2.1 of the IA-PC HPET Specification for a description of this
mode.
Periodic Mode
Timer 0 is the only timer that supports periodic mode. Consult Section 2.3.9.2.2 of the
IA-PC HPET Specification for a description of this mode.
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Datasheet
INTEL [ INTEL ]
